pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 156

• Manufacturer Part Number: pef22504
• Description: Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
• Manufacturer: Infineon Technologies Corporation

Clock Mode Register 2
CMR2
Clock Mode Register 2
Field
ECFAX
ECFAR
DCOXC
DCF
Data Sheet
Bits
7
6
5
4
Type
rw
rw
rw
rw
Description
Enable Corner Frequency Adjustment for DCO-X
See
Note: DCO-X must be activated.
0
1
Enable Corner Frequency Adjustment for DCO-R
See
Note: DCO-R must be activated.
0
1
DCO-X Center-Frequency Enable
See
0
1
DCO-R Center- Frequency Disabled
See also
0
1
B
B
B
B
B
B
B
B
Chapter
Chapter
Chapter 3.7.8
CMR4.IAX(4:0).
CMR5.IAR(4:0).
centers to 2.048 MHz related to the master clock reference (MCLK),
if reference clock (e.g. FCLKX) is missing.
2.048 MHz reference clock on pin SYNC is provided or in slave
mode if a loss-of-signal occurs in combination with no 2.048 MHz
clock on pin SYNC or a gapped clock is provided on pin RCLKI and
this clock is inactive or stopped.
generated clock (DCO-R) is frequency frozen in that moment when
no clock is available on pin SYNC or pin RCLKI. The DCO-R
circuitry starts synchronization as soon as a clock appears on pins
SYNC or RCLKI.
adjustment is disabled (only 2 Hz and 0.2 Hz are possible).
adjustment is enabled as programmed in CMR3.CFAX(3:0) and
adjustment is disabled (only 2 Hz and 0.2 Hz are possible).
adjustment is enabled as programmed in CMR3.CFAR(3:0) and
The center function of the DCO-X circuitry is disabled.
The center function of the DCO-X circuitry is enabled. DCO-X
The DCO-R circuitry is frequency centered in master mode if no
The center function of the DCO-R circuitry is disabled. The
Table
Offset
xx45
3.7.8.
3.7.8.
156
24.
H
Register DescriptionClock Mode Register 2
Rev. 1.3, 2006-01-25
QuadLIU
PEF 22504
Reset Value
00
TM
H