R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1128

IC SUPERH MPU ROMLESS 436-BGA

R8A77850ANBGV

Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850ANBGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
21. Serial Communication Interface with FIFO (SCIF)
21.6
Note the following when using the SCIF.
(1)
The TDFE flag in SCFSR is set when the number of transmit data bytes written in SCFTDR has
fallen to or below the transmit trigger count set by bits TTRG1 and TTRG0 in SCFCR. After
TDFE is set, transmit data up to the number of empty bytes in SCFTDR can be written, allowing
efficient continuous transmission.
However, if the number of data bytes written in SCFTDR is equal to or less than the transmit
trigger count, the TDFE flag will be set to 1 again, even after being read as 1 and cleared to 0.
Therefore, the TDFE flag should be cleared when SCFTDR contains more than the transmit
trigger count of transmit data bytes.
The number of transmit data bytes in SCFTDR can be found from SCTFDR.
(2)
The RDF flag in SCFSR is set when the number of receive data bytes in SCFRDR has become
equal to or greater than the receive trigger count set by bits RTRG1 and RTRG0 in SCFCR. After
RDF is set, receive data equivalent to the trigger count can be read from SCFRDR, allowing
efficient continuous reception.
However, if the number of data bytes read in SCFRDR is equal to or greater than the trigger count,
the RDF flag will be set to 1 again even if it is cleared to 0. After the receive data is read, clear the
RDF flag readout to 0 in order to reduce the number of data bytes in SCFRDR to less than the
trigger count.
The number of receive data bytes in SCFRDR can be found from SCRFDR.
(3)
If a framing error (FER) is detected, break signals can also be detected by reading the SCIF_RXD
pin value directly. In the break state the input values from the SCIF_RXD consists of all 0s, so the
FER flag is set and the parity error flag (PER) may also be set.
Although the SCIF stops transferring receive data to SCFRDR after receiving a break, the receive
operation continues.
Rev.1.00 Jan. 10, 2008 Page 1096 of 1658
REJ09B0261-0100
SCFTDR Writing and the TDFE Flag
SCFRDR Reading and the RDF Flag
Break Detection and Processing
Usage Notes

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