R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 128

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

5. Exception Handling
5.4
Table 5.3 shows the types of exceptions, with their relative priorities, vector addresses, and
exception/interrupt codes.
Table 5.3
Rev.1.00 Jan. 10, 2008 Page 96 of 1658
REJ09B0261-0100
Exception
Category
Reset
General
exception
Exception Types and Priorities
Execution
Mode
Abort type
Re-
execution
type
Exceptions
Exception
Power-on reset
Manual reset
H-UDI reset
Instruction TLB multiple-hit
exception
Data TLB multiple-hit exception
User break before instruction
execution*
Instruction address error
Instruction TLB miss exception
Instruction TLB protection
violation exception
General illegal instruction
exception
Slot illegal instruction exception
General FPU disable exception
Slot FPU disable exception
Data address error (read)
Data address error (write)
Data TLB miss exception (read)
Data TLB miss exception (write)
Data TLB protection
violation exception (read)
Data TLB protection
violation exception (write)
FPU exception
Initial page write exception
1
Priority
Level*
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
Priority
Order*
1
2
1
3
4
0
1
2
3
4
4
4
4
5
5
6
6
7
7
8
9
2
Vector
Address
H'A000 0000 —
H'A000 0000 —
H'A000 0000 —
H'A000 0000 —
H'A000 0000 —
(VBR/DBR)
(VBR)
(VBR)
(VBR)
(VBR)
(VBR)
(VBR)
(VBR)
(VBR)
(VBR)
(VBR)
(VBR)
(VBR)
(VBR)
(VBR)
(VBR)
Exception Transition
Direction*
Offset
H'100/— H'1E0
H'100
H'400
H'100
H'100
H'100
H'100
H'100
H'100
H'100
H'400
H'400
H'100
H'100
H'100
H'100
3
Exception
Code*
H'000
H'020
H'000
H'140
H'140
H'0E0
H'040
H'0A0
H'180
H'1A0
H'800
H'820
H'0E0
H'100
H'040
H'060
H'0A0
H'0C0
H'120
H'080
4