R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1356

IC SUPERH MPU ROMLESS 436-BGA

R8A77850ANBGV

Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850ANBGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
26. Serial Sound Interface (SSI) Module
7. Parallel Right Aligned with Delay
8. Mute Enabled
26.4.3
The compressed mode is used to transfer a continuous bit stream. This would typically be a
compressed bit stream which requires downstream decoding.
When burst mode is not enabled, there is no concept of a data word. However in order to receive
and transmit it is necessary to transfer between the serial bus and word formatted memory.
Therefore the word boundary selection is arbitrary during receive/transmit and must be dealt with
by another module. When burst mode is enabled then data bits being transmitted can be identified
by virtue of the fact that the serial clock output is only activated when there is a word to be output
and only the required number of clock pulses necessary to clock out each 32-bit word are
generated. The serial bit clock stops at a low level when SSICR.SCKP = 0, and at a high level
when SSICR.SCKP = 1. Note burst mode is only valid in the context of the SSI module being a
transmitter of data. Burst mode data cannot be received by this module.
Data is transmitted and received in blocks of 32 bits, and the first bit received/transmitted bit is bit
31 when stored in memory.
Rev.1.00 Jan. 10, 2008 Page 1324 of 1658
REJ09B0261-0100
SSI_SCK
SSI_WS
SSI_SDATA
When MUBN = 1 in transmit mode, a low level is output from the SSI_SDATA pin regardless of padding setting.
SSI_SCK
SSI_WS
SSI_SDATA
Compressed Modes
As basic sample format configuration except MUEN = 1 (TD data ignored)
As basic sample format configuration except PDTA = 1
TD0
0
Figure 26.16 Parallel Right Aligned with Delay
0
0
0
0
TD3 TD2 TD1 TD0
0
Figure 26.17 Mute Enabled
System word 1
System word 1
0
0
0
0
0
0
0
TD3 TD2 TD1 TD0
0
System word 2
System word 2
0
0
0
0
0
0
0
TD3
0

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