R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 932

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

19. Display Unit (DU)
Rev.1.00 Jan. 10, 2008 Page 900 of 1658
REJ09B0261-0100
Bit
9, 8
Bit Name
PnBRSL
Initial
Value
0
R/W
R/W Yes
Internal
Update Description
Plane n Blending Ratio Select
This bit is valid when the following two conditions are
satisfied.
•
•
00: The PnALPHA bits in this register are taken to be the
01: Setting prohibited
10: Bits 31 to 24 of the color palette register specified by
Note: Enabled only when the display data format
11: The display data for the plane specified by bits 2 to 0
•
•
•
•
•
•
Notes: 1. When the register's own plane is specified, the
•
•
•
•
blend ratio.
the PnCPSL bit in PnMR are taken to be the blend
ratio.
of the PnALPHA bits in this register is taken to be the
blend ratio.
When the PnSPIM bit in PnMR specifies blending.
When the ABRE bit in DEFR is set to 1.
Bits 2 to 0 = 000: Display data for plane 1 is the
blend ratio
Bits 2 to 0 = 001: Display data for plane 2 is the
blend ratio
Bits 2 to 0 = 010: Display data for plane 3 is the
blend ratio
Bits 2 to 0 = 011: Display data for plane 4 is the
blend ratio
Bits 2 to 0 = 100: Display data for plane 5 is the
blend ratio
Bits 2 to 0 = 101: Display data for plane 6 is the
blend ratio
The display should be turned on using DPPR.
The display data format should be set to 8 bits/pixel.
The display size (plane n display size X register
(PnDSXR), plane n display size Y register
(PnDSYR)) should be set equal to or greater than
the size of the plane forth is register.
The display position (plane n display position X
register (PnDPXR), plane n display position Y
register (PnDPYR)) should be the same as for the
plane of this register.
specified by the PnDDF bit in PnMR is 8 bits/pixel.
For formats other than 8 bits/pixel, the blend ratio
is determined by the PnALPHA bits in this register.
2. The specified plane should satisfy the
PnALPHA bits in this register are taken to be
the blend ratio.
following conditions. If the conditions are not
satisfied, the blend ratio is undefined.