R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 351

IC SUPERH MPU ROMLESS 436-BGA

R8A77850ANBGV

Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850ANBGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(5)
(6)
Module
MMCIF
Module
FLCTL
INT2B4: Detailed Interrupt Sources for the MMCIF
INT2B5: Detailed Interrupt Sources for the FLCTL
Bit
31 to 4
3
2
1
0
Bit
31 to 4
3
2
1
0
Name
FRDY
ERR
TRAN
FSTAT
Name
FLTRQ1
FLTRQ0
FLTEND
FLSTE
Detailed Source
Reserved
These bits are read as 0
and cannot be modified.
FIFO ready end interrupt
CRC error interrupt, data
timeout error interrupt,
or command timeout
error interrupt
Data response interrupt,
data transfer end
interrupt, command
response receive end
interrupt, command
transmit end interrupt, or
data busy end interrupt
FIFO empty interrupt or
FIFO full interrupt
FLCTL transfer end
FLCTL status error
Detailed Source
Reserved
These bits are read as
0 and cannot be
modified.
FLCTL FLECFIFO
transfer request
interrupt
FLCTL TLDTFIFO
transfer request
interrupt
interrupt
interrupt or ready/busy
timeout error interrupt
FLCTL interrupt sources are
indicated. This register indicates the
FLCTL interrupt sources even if the
mask setting for FLCTL is made in
the interrupt mask register.
Description
MMCIF interrupt sources are
indicated. This register indicates the
MMCIF interrupt sources even if the
mask setting for MMCIF is made in
the interrupt mask register.
Description
Rev.1.00 Jan. 10, 2008 Page 319 of 1658
10. Interrupt Controller (INTC)
REJ09B0261-0100

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