R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1394
![IC SUPERH MPU ROMLESS 436-BGA](/photos/28/62/286211/436-bfbga_sml.jpg)
R8A77850ANBGV
Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77850AADBGV.pdf
(1694 pages)
Specifications of R8A77850ANBGV
Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 1394 of 1694
- Download datasheet (9Mb)
27. NAND Flash Memory Controller (FLCTL)
27.3.12 Control Code FIFO Register (FLECFIFO)
FLECFIFO is used to read from or write to the control code FIFO area.
The read and write directions specified by the SELRW bit in FLCMDCR must match the read and
write access directions specified in this register.
Rev.1.00 Jan. 10, 2008 Page 1362 of 1658
REJ09B0261-0100
Initial value:
Initial value:
Bit
31 to 24
23 to 16
15 to 8
7 to 0
R/W:
R/W:
Bit:
Bit:
Bit Name
ECFO[31:24]
ECFO[23:16]
ECFO[15:8]
ECFO[7:0]
R/W
R/W
31
—
15
—
R/W
R/W
30
—
14
—
R/W
R/W
29
—
13
—
Initial
Value
Undefined
Undefined
Undefined
Undefined
ECFO[31:24]
ECFO[15:8]
R/W
R/W
28
—
12
—
R/W
R/W
27
—
11
—
R/W Description
R/W First Data
R/W Second Data
R/W Third Data
R/W Fourth Data
R/W
R/W
26
—
10
—
Specify the first data to be input or output via the FD7 to
FD0 pins.
In writing: Specify write data
In reading: Store read data
Specify the second data to be input or output via the
FD7 to FD0 pins.
In writing: Specify write data
In reading: Store read data
Specify the third data to be input or output via the FD7
to FD0 pins.
In writing: Specify write data
In reading: Store read data
Specify the fourth data to be input or output via the FD7
to FD0 pins.
In writing: Specify write data
In reading: Store read data
R/W
R/W
25
—
—
9
R/W
R/W
24
—
—
8
R/W
R/W
23
—
—
7
R/W
R/W
22
—
—
6
R/W
R/W
21
—
—
5
ECFO[23:16]
R/W
ECFO[7:0]
R/W
20
—
—
4
R/W
R/W
19
—
—
3
R/W
R/W
18
—
—
2
R/W
R/W
17
—
—
1
R/W
R/W
—
—
16
0
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