R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 627

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Bit
28 to 20 LSR
19 to 1
0
Bit Name
⎯
MBARE
Initial
Value
0 0000
0000
All 0
0
R/W
SH: R/W
PCI: R
SH: R
PCI: R
PCI: R
SH: R/W
Description
Capacity of Local Address Spaces 1 (9 bits)
These bits specify the size of the local address space
1 (address space for this LSI internal bus) in byte
units.
(Specified size (Mbytes) − 1) should be set to these
bits. When all bits are set to 0, 1-Mbyte space is
secured (initial value).
B'0 0000 0000: 1 Mbyte
B'0 0000 0001: 2 Mbytes
B'0 0000 0011: 4 Mbytes
B'0 0000 0111: 8 Mbytes
B'0 0000 1111: 16 Mbytes
B'0 0001 1111: 32 Mbytes
B'0 0011 1111: 64 Mbytes
B'0 0111 1111: 128 Mbytes
B'0 1111 1111: 256 Mbytes
B'1 1111 1111: 512 Mbytes
Other than above: Setting prohibited
Reserved
These bits are always read as 0. The write value
should always be 0.
PCI Memory Base Address Register 1 Enable
Enables accesses to the local address space 1 by
setting this bit to 1.
0: MBAR1 disabled
1: MBAR1 enabled
Rev.1.00 Jan. 10, 2008 Page 595 of 1658
13. PCI Controller (PCIC)
REJ09B0261-0100