R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 346

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

10. Interrupt Controller (INTC)
10.3.4
INT2B0 to INT2B7 are registers that indicate more details on each interrupt source, in addition to
the interrupt source that is corresponding to each module and is indicated in the interrupt source
register. INT2B0 to INT2B7 are 32-bit read-only registers that are not affected by the masked
state in the interrupt mask register. To mask each detailed source independently, set the interrupt
mask register of the corresponding module, or the interrupt enable register.
(1)
Rev.1.00 Jan. 10, 2008 Page 314 of 1658
REJ09B0261-0100
Initial value:
Initial value:
Module
TMU
R/W:
R/W:
INT2B0: Detailed Interrupt Sources for the TMU
Bit:
Bit:
Individual On-Chip Module Interrupt Source Registers (INT2B0 to INT2B7)
Bit
31 to 7
6
5
4
3
2
1
0
31
15
—
—
R
R
30
—
14
—
R
R
Name
⎯
TUNI5
TUNI4
TUNI3
TICPI2
TUNI2
TUNI1
TUNI0
29
—
13
—
R
R
28
12
—
—
R
R
27
11
—
—
R
R
Detailed Source
Reserved
These bits are read as 0
and cannot be modified.
TMU channel 5 underflow
interrupt
TMU channel 4 underflow
interrupt
TMU channel 3 underflow
interrupt
TMU channel 2 input
capture interrupt
TMU channel 2 underflow
interrupt
TMU channel 1 underflow
interrupt
TMU channel 0 underflow
interrupt
26
10
—
—
R
R
25
—
—
R
R
9
24
—
—
R
R
8
23
—
—
R
R
7
22
—
—
R
R
6
Description
TMU interrupt sources are
indicated. This register indicates
the TMU interrupt sources even if
the mask setting for TMU is made
in the interrupt mask register.
21
—
—
R
R
5
20
—
—
R
R
4
19
—
—
R
R
3
18
—
—
R
R
2
17
—
—
R
R
1
16
—
—
R
R
0