HD6417041AVF16V Renesas Electronics America, HD6417041AVF16V Datasheet - Page 247
HD6417041AVF16V
Manufacturer Part Number
HD6417041AVF16V
Description
IC SUPERH MCU ROMLESS 144QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7040r
Specifications of HD6417041AVF16V
Core Processor
SH-2
Core Size
32-Bit
Speed
28.7MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417041AVF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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6.1.52
Description: Returns from a subroutine procedure. The PC values are restored from the PR, and
the program continues from the address specified by the restored PC value. This instruction is used
to return to the program from a subroutine program called by a BSR, BSRF, or JSR instruction.
Note: Since this is a delayed branch instruction, the instruction after this RTS is executed before
Operation:
Format
RTS
RTS() /* RTS */
{
}
unsigned long temp;
temp=PC;
PC=PR+4;
Delay_Slot(temp+2);
branching. No address errors and interrupts are accepted between this instruction and the
next instruction. If the next instruction is a branch instruction, it is acknowledged as an
illegal slot instruction.
RTS (Return from Subroutine): Branch Instruction (Class: Delayed Branch
Instruction)
Abstract
Delayed branch,
PR
PC
Code
0000000000001011 2
Rev. 5.00 Jun 30, 2004 page 231 of 512
Section 6 Instruction Descriptions
Cycle
T
Bit SH-1 SH-2
—
REJ09B0171-0500O
Instructions
Applicable
SH-
DSP
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