HD6417041AVF16V Renesas Electronics America, HD6417041AVF16V Datasheet - Page 69

• Manufacturer Part Number: HD6417041AVF16V
• Description: IC SUPERH MCU ROMLESS 144QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7040r

Specifications of HD6417041AVF16V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 28.7MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

4.7.3
The DC bit is set as follows depending on the specification of the CS0-CS2 bits (condition select
bits) of the DSR register.
Carry/Borrow Mode: CS2–CS0 = 000: The DC bit indicates whether a carry or borrow has
occurred from the MSB of the operation result. The guard bits have no affect on this. This mode is
the default. Figure 4.8 shows examples when carries and borrows occur.
Negative Mode: CS2–CS0 = 001: In this mode, the DC bit is the same as the MSB of the
operation result. When a result is negative, the DC bit is 1. When the result is positive, the DC bit
is 0. ALU arithmetic operations are always done in 40 bits. The sign bit indicating positive or
negative is thus the MSB included in the guard bits of the operation result rather than the MSB of
the destination operand. Figure 4.9 shows an example of distinguishing negative from positive. In
this mode, the DC bit has the same value as the condition bit N.
Example 1: Carry
Example 3: Borrow
+)
Ð)
0000 0000 0000 0000 0000 0001
0000 0000 0000 0000 0000 0001
0000 0000 0000 0000 0000 0000
0000 0000 1111 1111 1111 1111
0000 0000 0000 0000 0000 0001
0000 0001 0000 0000 0000 0000
Guard bits
Guard bits
DC Bit
Position where
carry is detected
Position where
borrow is detected
Figure 4.8 Examples of Carries and Borrows
Example 2: Carry
Example 4: Borrow
(1)
+)
Ð)
1111 1111 0111 0000 0000 0000
0011 1111 0001 0000 0000 0000
0011 1110 1000 0000 0000 0000
0000 0000 0001 0000 0000 0001
0000 0000 0001 0000 0000 0010
1111 1111 1111 1111 1111 1111
Guard bits
Guard bits
Rev. 5.00 Jun 30, 2004 page 53 of 512
Section 4 Instruction Features
Position where
carry is detected
Position where
borrow is detected
REJ09B0171-0500O