HD6417041AVF16V Renesas Electronics America, HD6417041AVF16V Datasheet - Page 416
HD6417041AVF16V
Manufacturer Part Number
HD6417041AVF16V
Description
IC SUPERH MCU ROMLESS 144QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7040r
Specifications of HD6417041AVF16V
Core Processor
SH-2
Core Size
32-Bit
Speed
28.7MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417041AVF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 6 Instruction Descriptions
6.3.22
Description: Subtracts the contents of the Sy operand and the DC bit from the Sx operand and
stores the result in the Dz operand. The DC bit of the DSR register is updated as the borrow flag.
The N, Z, V, and GT bits of the DSR register are also updated.
Note: After the PSUBC instruction is executed, the DC bit is updated as the borrow flag without
Operation:
Rev. 5.00 Jun 30, 2004 page 400 of 512
REJ09B0171-0500O
Format
PSUBC
Sx,Sy,Dz
/* PSUBC Sx,Sy,Dz
{
unsigned char carry_bit, borrow_bit, negative_bit, zero_bit,
overflow_bit;
/* ALU Sources assignment */
switch (xx) {
case 0x0: DSP_ALU_SRC1
case 0x1: DSP_ALU_SRC1
case 0x2: DSP_ALU_SRC1
case 0x3: DSP_ALU_SRC1
regard to the CS bit.
PSUBC (Subtraction with Carry): DSP Arithmetic Operation Instruction
Abstract
Sx – Sy – DC Dz
if (DSP_ALU_SRC1_MSB) DSP_ALU_SRC1G = 0xff;
else
break;
if (DSP_ALU_SRC1_MSB) DSP_ALU_SRC1G = 0xff;
else
break;
DSP_ALU_SRC1G = A0G;
break;
/* Sx Operand selection bit (xx) */
*/
Code
111110**********
10100000xxyyzzzz
DSP_ALU_SRC1G = 0x0;
DSP_ALU_SRC1G = 0x0;
= X0;
= X1;
= A0;
= A1;
Cycle DC Bit
1
Borrow —
SH-1 SH-2
Instructions
Applicable
—
SH-
DSP
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