# ATMEGA103-6AI Atmel, ATMEGA103-6AI Datasheet - Page 135

#### ATMEGA103-6AI

Manufacturer Part Number

ATMEGA103-6AI

Description

IC MCU 128K 6MHZ A/D IT 64TQFP

Manufacturer

Atmel

Series

AVR® ATmegar

#### Specifications of ATMEGA103-6AI

Core Processor

AVR

Core Size

8-Bit

Speed

6MHz

Connectivity

SPI, UART/USART

Peripherals

POR, PWM, WDT

Number Of I /o

32

Program Memory Size

128KB (64K x 16)

Program Memory Type

FLASH

Eeprom Size

4K x 8

Ram Size

4K x 8

Voltage - Supply (vcc/vdd)

4 V ~ 5.5 V

Data Converters

A/D 8x10b

Oscillator Type

Internal

Operating Temperature

-40°C ~ 85°C

Package / Case

64-TQFP, 64-VQFP

For Use With

ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

Instruction Set Summary

Mnemonic

Operands

Description

ARITHMETIC AND LOGIC INSTRUCTIONS

ADD

Rd, Rr

Add Two Registers

ADC

Rd, Rr

Add with Carry Two Registers

ADIW

Rdl, K

Add Immediate to Word

SUB

Rd, Rr

Subtract Two Registers

SUBI

Rd, K

Subtract Constant from Register

SBC

Rd, Rr

Subtract with Carry Two Registers

SBCI

Rd, K

Subtract with Carry Constant from Reg.

SBIW

Rdl, K

Subtract Immediate from Word

AND

Rd, Rr

Logical AND Registers

ANDI

Rd, K

Logical AND Register and Constant

OR

Rd, Rr

Logical OR Registers

ORI

Rd, K

Logical OR Register and Constant

EOR

Rd, Rr

Exclusive OR Registers

COM

Rd

One’s Complement

NEG

Rd

Two’s Complement

SBR

Rd, K

Set Bit(s) in Register

CBR

Rd, K

Clear Bit(s) in Register

INC

Rd

Increment

DEC

Rd

Decrement

TST

Rd

Test for Zero or Minus

CLR

Rd

Clear Register

SER

Rd

Set Register

BRANCH INSTRUCTIONS

RJMP

k

Relative Jump

IJMP

Indirect Jump to (Z)

JMP

k

Direct Jump

RCALL

k

Relative Subroutine Call

ICALL

Indirect Call to (Z)

CALL

k

Direct Subroutine Call

RET

Subroutine Return

RETI

Interrupt Return

CPSE

Rd, Rr

Compare, Skip if Equal

CP

Rd, Rr

Compare

CPC

Rd, Rr

Compare with Carry

CPI

Rd, K

Compare Register with Immediate

SBRC

Rr, b

Skip if Bit in Register Cleared

SBRS

Rr, b

Skip if Bit in Register is Set

SBIC

P, b

Skip if Bit in I/O Register Cleared

SBIS

P, b

Skip if Bit in I/O Register is Set

BRBS

s, k

Branch if Status Flag Set

BRBC

s, k

Branch if Status Flag Cleared

BREQ

k

Branch if Equal

BRNE

k

Branch if Not Equal

BRCS

k

Branch if Carry Set

BRCC

k

Branch if Carry Cleared

BRSH

k

Branch if Same or Higher

BRLO

k

Branch if Lower

BRMI

k

Branch if Minus

BRPL

k

Branch if Plus

BRGE

k

Branch if Greater or Equal, Signed

BRLT

k

Branch if Less Than Zero, Signed

BRHS

k

Branch if Half-carry Flag Set

BRHC

k

Branch if Half-carry Flag Cleared

BRTS

k

Branch if T-flag Set

BRTC

k

Branch if T-flag Cleared

BRVS

k

Branch if Overflow Flag is Set

BRVC

k

Branch if Overflow Flag is Cleared

BRIE

k

Branch if Interrupt Enabled

BRID

k

Branch if Interrupt Disabled

DATA TRANSFER INSTRUCTIONS

ELPM

Extended Load Program Memory

MOV

Rd, Rr

Move between Registers

LDI

Rd, K

Load Immediate

0945I–AVR–02/07

ATmega103(L)

Operation

Rd ← Rd + Rr

Rd ← Rd + Rr + C

Rdh:Rdl ← Rdh:Rdl + K

Rd ← Rd - Rr

Rd ← Rd - K

Rd ← Rd - Rr - C

Rd ← Rd - K - C

Rdh:Rdl ← Rdh:Rdl - K

Rd ← Rd • Rr

Rd ← Rd • K

Rd ← Rd v Rr

Rd ← Rd v K

Rd ← Rd ⊕ Rr

Rd ← $FF - Rd

Rd ← $00 - Rd

Rd ← Rd v K

Rd ← Rd • ($FF - K)

Rd ← Rd + 1

Rd ← Rd - 1

Rd ← Rd • Rd

Rd ← Rd ⊕ Rd

Rd ← $FF

PC ← PC + k + 1

PC ← Z

PC ← k

PC ← PC + k + 1

PC ← Z

PC ← k

PC ← STACK

PC ← STACK

if (Rd = Rr) PC ← PC + 2 or 3

Rd - Rr

Rd - Rr - C

Rd - K

if (Rr(b) = 0) PC ← PC + 2 or 3

if (Rr(b) = 1) PC ← PC + 2 or 3

if (P(b) = 0) PC ← PC + 2 or 3

if (P(b) = 1) PC ← PC + 2 or 3

if (SREG(s) = 1) then PC ← PC + k + 1

if (SREG(s) = 0) then PC ← PC + k + 1

if (Z = 1) then PC ← PC + k + 1

if (Z = 0) then PC ← PC + k + 1

if (C = 1) then PC ← PC + k + 1

if (C = 0) then PC ← PC + k + 1

if (C = 0) then PC ← PC + k + 1

if (C = 1) then PC ← PC + k + 1

if (N = 1) then PC ← PC + k + 1

if (N = 0) then PC ← PC + k + 1

if (N ⊕ V = 0) then PC ← PC + k + 1

if (N ⊕ V = 1) then PC ← PC + k + 1

if (H = 1) then PC ← PC + k + 1

if (H = 0) then PC ← PC + k + 1

if (T = 1) then PC ← PC + k + 1

if (T = 0) then PC ← PC + k + 1

if (V = 1) then PC ← PC + k + 1

if (V = 0) then PC ← PC + k + 1

if (I = 1) then PC ← PC + k + 1

if (I = 0) then PC ← PC + k + 1

R0 ← (Z + RAMPZ)

Rd ← Rr

Rd ← K

Flags

# Clocks

Z,C,N,V,H

1

Z,C,N,V,H

1

Z,C,N,V,S

2

Z,C,N,V,H

1

Z,C,N,V,H

1

Z,C,N,V,H

1

Z,C,N,V,H

1

Z,C,N,V,S

2

Z,N,V

1

Z,N,V

1

Z,N,V

1

Z,N,V

1

Z,N,V

1

Z,C,N,V

1

Z,C,N,V,H

1

Z,N,V

1

Z,N,V

1

Z,N,V

1

Z,N,V

1

Z,N,V

1

Z,N,V

1

None

1

None

2

None

2

None

3

None

3

None

3

None

4

None

4

I

4

None

1/2/3

Z,N,V,C,H

1

Z,N,V,C,H

1

Z,N,V,C,H

1

None

1/2/3

None

1/2/3

None

1/2/3

None

1/2/3

None

1/2

None

1/2

None

1/2

None

1/2

None

1/2

None

1/2

None

1/2

None

1/2

None

1/2

None

1/2

None

1/2

None

1/2

None

1/2

None

1/2

None

1/2

None

1/2

None

1/2

None

1/2

None

1/2

None

1/2

None

3

None

1

None

1

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