IC MCU 128K 6MHZ A/D IT 64TQFP

ATMEGA103-6AI

Manufacturer Part NumberATMEGA103-6AI
DescriptionIC MCU 128K 6MHZ A/D IT 64TQFP
ManufacturerAtmel
SeriesAVR® ATmega
ATMEGA103-6AI datasheets
 


Specifications of ATMEGA103-6AI

Core ProcessorAVRCore Size8-Bit
Speed6MHzConnectivitySPI, UART/USART
PeripheralsPOR, PWM, WDTNumber Of I /o32
Program Memory Size128KB (64K x 16)Program Memory TypeFLASH
Eeprom Size4K x 8Ram Size4K x 8
Voltage - Supply (vcc/vdd)4 V ~ 5.5 VData ConvertersA/D 8x10b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case64-TQFP, 64-VQFPFor Use WithATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
Lead Free Status / RoHS StatusContains lead / RoHS non-compliant  
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Page 27/141

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Power-on Reset
0945I–AVR–02/07
Table 5. Reset Characteristics (V
Symbol
Parameter
Power-on Reset Threshold
(rising)
(1)
V
POT
Power-on Reset Threshold
(falling)
V
RESET Pin Threshold Voltage
RST
T
Reset Delay Time-out Period
TOUT
Note:
1. The Power-on Reset will not work unless the supply voltage has been below V
(falling).
A Power-on Reset (POR) circuit ensures that the device is Reset from Power-on. As
shown in Figure 23, an internal timer clocked from the Watchdog Timer Oscillator pre-
vents the MCU from starting until after a certain period after V
on Threshold voltage (V
), regardless of the V
POT
bits SUT1 and SUT0 are used to select start-up time as indicated in Table 5. A “0” in the
table indicates that the fuse is programmed.
The user can select the start-up time according to typical Oscillator start-up time. The
number of WDT Oscillator cycles used for each Time-out except for SUT = 00 is shown
in Table 6. The frequency of the Watchdog Oscillator is voltage-dependent as shown in
“Typical Characteristics” on page 123.
Table 6. Number of Watchdog Oscillator Cycles
SUT 1/0
Time-out at V
= 5V
CC
01
0.5 ms
10
4.0 ms
11
16.0 ms
The setting SUT 1/0 = 00 starts the MCU after 5 CPU clock cycles, and can be used
when an external clock signal is applied to the XTAL1 pin. This setting does not use the
WDT Oscillator and enables very fast start-up from the sleep modes Power-down or
Power-save if the clock signal is present during sleep. For details, refer to the program-
ming specification starting on page 104.
If the built-in start-up delay is sufficient, RESET can be connected to V
an external pull-up resistor. By holding the pin low for a period after V
applied, the Power-on Reset period can be extended. Refer to Figure 25 for a timing
example of this.
ATmega103(L)
= 5.0V)
CC
Condition
Min
Typ
1.0
1.4
0.4
0.6
V
/2
CC
SUT = 00
5
SUT = 01
0.4
0.5
SUT = 10
3.2
4.0
SUT = 11
12.8
16.0
has reached the Power-
CC
rise time (see Figure 24). The Fuse
CC
Number of WDT Cycles
512
4K
16K
Max
Units
1.8
V
0.8
V
V
CPU cycles
0.6
4.8
ms
19.2
POT
directly or via
CC
has been
CC
27