IP-POSPHY4 Altera, IP-POSPHY4 Datasheet - Page 107

• Manufacturer Part Number: IP-POSPHY4
• Description: IP CORE - POS-PHY Level 4 SPI 4.2 Interface
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IP-POSPHY4

• Software Application: IP CORE, Interface And Protocols, COMMUNICATION
• Supported Families: Arria GX, Cyclone, HardCopy, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: POS-PHY Level 4 Interface, Link-Layer/PHY Layer
• License: Initial License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 6: Testbench
Transmitter Testbench Description
Table 6–5. Training Pattern Commands
December 2010 Altera Corporation
Pause
Data Packet
Command
sapgen.portN.pause;
sapgen.portN.pkt (length,
packet number, error);
The testbench consists of three basic modules: data generator, user transmitter
variation, and packet analyzer. All testbench modules are in the <variation name>_tb.v
file. The testbench also consists of multiple support modules for pin monitoring, clock
generation, SPI-4.2 state machine tracking, and reset generation (refer to
page
Each generator creates packets for a single port, via Verilog HDL tasks. These packets
are received by the user’s transmitter variation, which processes the packets and
converts them to SPI-4.2 bus format. Finally, the packet analyzer module receives the
data from the SPI-4.2 interface and verifies the data is correct.
Figure 6–2. Transmitter Testbench
Framing is asserted from the packet analyzer module’s status channel going to the
POS-PHY Level 4 transmitter MegaCore function, which asserts the training pattern
(16'h0fff,16'hf000) until the receiver is synchronized. When the synchronization is
complete, the data generator module begins sending data.
During the main test the data generator module sends data to each port using Verilog
HDL tasks.
Format
6–7). The data generator module consists of one Atlantic generator per port.
POS-PHY Level 4
Packet Analyzer
Table 6–5
Reset
Interface
SPI-4.2
summarizes the tasks that send data.
This command pauses a given port. No data is sent to a paused port. N is
the port number to pause.
N is the port to which the data packet is sent.
length is the number in bytes of the data pattern.
packet number is a user-supplied number that identifies the packet.
error generates an error on the Atlantic interface.
The error value can be:
■
■
0: No error.
1: Assert Atlantic error, set header error bit.
Device Under Test
Transmitter
POS-PHY
Variation
Generator
Level 4
Clock
Description
POS-PHY Level 4 MegaCore Function User Guide
Interface
Atlantic
Atlantic Interface
Data Generator
(one per port)
Pin Monitor
Figure 6–2 on
6–7