IP-POSPHY4 Altera, IP-POSPHY4 Datasheet - Page 35

• Manufacturer Part Number: IP-POSPHY4
• Description: IP CORE - POS-PHY Level 4 SPI 4.2 Interface
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IP-POSPHY4

• Software Application: IP CORE, Interface And Protocols, COMMUNICATION
• Supported Families: Arria GX, Cyclone, HardCopy, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: POS-PHY Level 4 Interface, Link-Layer/PHY Layer
• License: Initial License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 3: Parameter Settings
Protocol Parameters
December 2010 Altera Corporation
1
To be effective, the far-end scheduler must handle received status optimistically. As
status is received, credits for each port are topped up to MaxBurst1/MaxBurst2
levels.
Turn on Asymmetric Port Support to instantiate an Avalon
(Avalon-MM) interface in the MegaCore function. The Avalon-MM interface
programs the values of calendar length, calendar multiplier, and the port numbers for
each of the calendar slots.
If you turn on Asymmetric Port Support, the calendar length is programmed from
the Avalon-MM interface (refer to
If you turn on Programmable calendar length, a calendar length input pin is added to
the MegaCore function. This pin allows you to vary the calendar length value from
one to the number of ports without having to recompile. If the programmable
calendar length support parameter is turned off, the calendar length is equal to the
number of ports.
The calendar length value cannot be greater than the number of ports (except when
you turn on Asymmetrical Port Support).
The Calendar multiplier determines the number of times the calendar sequence is
repeated before the DIP-2 parity and framing is inserted. Choose a value from 1 to
256.
If the Asymmetric Port Support is turned on, the calendar multiplier value is
programmed via the Avalon-MM interface.
The calendar multiplier × calendar length value must be set according to the
instructions in
status channel does not operate correctly.
The Maximum calendar length (only available when you turn on Asymmetric Port
Support) defines the maximum number of calendar entries available in the
configurable calendar. Choose a value from 32 to 2,048.
When you turn on Hitless B/W Reprovisioning (only available when you turn on
Asymmetric Port Support), the receiver can transmit a calendar-select word in the
status frame. Active and inactive calendars are tied to the current calendar-select
word in the receiver. When the current calendar-select word changes, the active and
inactive calendars are swapped at the appropriate time, in the following order:
■
■
■
■
■
The CALSEL_REQ register bit is toggled at the receiver (refer to
At the beginning of the next status frame, the calendar-select word is toggled.
The receiver toggles the used calendar multiplier, calendar length, and calendar to
transmit the next status frame.
The transmitter receives the first calendar-select word of the new frame and
detects the toggle.
The transmitter toggles the used calendar multiplier, calendar length, and
calendar to interpret the next status frame.
Table C–1 on page C–1
Appendix
of the
“Clock Structure”
E).
POS-PHY Level 4 MegaCore Function User Guide
®
Memory-Mapped
section, otherwise the
page
4–30).
3–13