cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 274

• Manufacturer Part Number: cs5535
• Description: Geode Cs5535 Companion Multi-function South Bridge
• Manufacturer: National Semiconductor Corporation

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USB Register Descriptions
5.5.3.10
Index
Type
Reset Value
5.5.3.11
Index
Type
Reset Value
This BAR sets the base address of the memory mapped USB controller registers. Bits [11:0] are read only (0000 0000
0000), indicating a 4 kB memory address range. Refer to Section 5.5.4 "Host Controller Native Registers" on page 277 for
the USB controller register bit formats and reset values.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31:12
11:4
Bit
7:0
Bit
7:0
Bit
2:1
3
0
7
BIST (USBC_PCI_BIST)
Base Address Register (USBC_PCI_BAR)
Name
PCI_HEADER
Name
PCI_BIST
Name
BASE_ADDR
ADDR_RNG
PREFETCH
WIDTH
MEM
0Fh
RO
00h
10h
R/W
00000000h
6
BASE_ADDR
Description
PCI Header Type. This register identifies the type of the predefined header in the con-
figuration space. Since the USB is a single function device and not a PCI-to-PCI bridge,
this byte should be read as 00h.
Description
PCI BIST. This register identifies the control and status of Built In Self Test. The USB
does not implement BIST, so this register is read only.
Description
Base Address. POST writes the value of the memory base address to this register.
Address Range (Always 0.) Indicates a 4k byte address range is requested.
Prefetch (Always 0). Indicates there is no support for prefetchable memory.
Width (Always 0). Indicates that the base register is 32-bits wide and can be placed
anywhere in 32-bit memory space.
Memory (Always 0). Indicates that the operational registers are mapped into memory
space.
5
USBC_PCI_HEADER Bit Descriptions
(Continued)
USBC_PCI_BIST Bit Descriptions
USBC_PCI_BAR Bit Descriptions
USBC_PCI_BIST Register Map
USBC_PCI_BAR Register Map
4
PCI_BIST
274
3
2
9
ADDR_RNG
8
7
6
1
5
4
3
WIDTH
2
Revision 0.8
0
1
0