cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 490

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cs5535

Manufacturer Part Number
cs5535
Description
Geode Cs5535 Companion Multi-function South Bridge
Manufacturer
National Semiconductor Corporation
Datasheet

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PMC Register Descriptions
5.18.3.6
PMS I/O Offset
Type
Reset Value
Reads always return the value written.
5.18.3.7
PMS I/O Offset
Type
Reset Value
Reads always return the value written.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
29:0
Bit
31
30
Bit
31
30
PM Sleep End Delay (PM_SED)
PM Sleep Control X De-assert Delay (PM_SCXD)
Name
RSVD
SLPX_END_EN
Name
RSVD
SLPEND_EN
SLPEND_DELAY
14h
R/W
00000000h
18h
R/W
00000000h
Description
Reserved. By convention write 0, but may write anything.
Sleep X De-assert and Delay Enable. Must be high to de-assert SLEEP_X and
enable the delay specified in bits [29:0] (SLPX_END_DELAY).
Description
Reserved. By convention write 0, but may write anything.
Sleep End Delay Enable. Must be high to enable the delay specified in bits [29:0]
(SLPEND_DELAY).
Sleep End Delay. Indicates the number of 3.57954 MHz clock edges to wait from
Sleep wakeup before de-asserting SUSP#. Bit 30 (SLPEND_EN) must be high to
enable this delay.
If PCI_IDE_IN_SLP is not enabled (PMS I/O Offset 20h[30] = 0) or the delay is less
than SLPEND_DELAY, SUSP# de-asserts at the same time the PCI/IDE inputs are re-
enabled.
(Continued)
PM_SCXD Bit Descriptions
PM_SED Bit Descriptions
PM_SCXD Register Map
PM_SED Register Map
SLPX_END_DELAY
SLPEND_DELAY
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