cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 510

• Manufacturer Part Number: cs5535
• Description: Geode Cs5535 Companion Multi-function South Bridge
• Manufacturer: National Semiconductor Corporation

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Flash Controller Register Descriptions
5.19.2.6
ECC parity registers contain 22 parity bits. The bit location and definition follows the SmartMedia Physical Format Specifi-
cations.NAND ECC LSB Line Parity (NAND_ECC_LSB)
Flash Memory Offset 811h
Flash I/O Offset
Type
Reset Value
Bit
Bit
7:0
2
1
0
7
NAND ECC Parity Registers
Name
PARITY
CLRECC
ENECC
Name
LP[7:0]
6
09h
R/W
FFh
Description
Parity.
0: ECC Parity registers are even parity.
1: ECC Parity registers are odd parity.
In the case of odd ECC parity, the value read from NAND_ECC_LSB (Flash Memory
Offset 811h/Flash I/O Offset 09h), NAND_ECC_MSB (Flash Memory Offset
812h/Flash I/O Offset 0Ah), and NAND_ECC_COL (Flash Memory Offset 813h/Flash
I/O Offset 0Bh) parity registers will be complement of the value written into these regis-
ters (except for LSB two bits of the NAND_ECC_COL register, they are always 11b for
odd parity).
Clear ECC Engine. Write 1 to clear ECC parity registers (NAND_ECC_LSB,
NAND_ECC_MSB, and NAND_ECC_COL), NAND Line Address Counter register
(NAND_LAC) and reset the ECC engine. Writing 0 has no effect.
The ECC engine contains an 8-bit Line Address Counter (LAC) to keep track of data
that has been read from or written into the NAND Flash. Software has to reset the
counter by writing a 1 to the CLRECC bit before transferring data to/from the NAND
Flash. Every data byte transferred to/from the NAND Flash Controller increments the
LAC. The NAND_LAC (Flash Memory Offset 814h/Flash I/O Offset 0Ch) register
reports the current count of the LAC.
Enable ECC Calculation Engine.
0: Disable ECC Engine. ECC engine holds previous value.
1: Enable ECC Engine. Every data byte transferred to/from the NAND Flash Controller
Description
Line Parity Bits 7 through 0.
will be counted in ECC calculation.
5
NAND_ECC_LSB Bit Descriptions
NAND_ECC_CTL Bit Descriptions
NAND_ECC_LSB Register Map
4
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