cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 487

• Manufacturer Part Number: cs5535
• Description: Geode Cs5535 Companion Multi-function South Bridge
• Manufacturer: National Semiconductor Corporation

Revision 0.8
PMC Register Descriptions
5.18.3 PM Support Registers
The registers listed in this sub-section are not ACPI registers, but are used to support power management implementation.
5.18.3.1
PMS I/O Offset
Type
Reset Value
5.18.3.2
PMS I/O Offset
Type
Reset Value
Reads always return the value written.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
15
11:0
Bit
15
14
13
12
Bit
31
30
RSVD
14
PM Sleep Start Delay (PM_SSD)
PM Sleep Control X Assert Delay and Enable (PM_SCXA)
Name
SLP_EN_INDIC
RSVD
SLP_WRT_EN
SLP_DELAY_EN
SLP_DELAY
Name
RSVD
SLPX_EN
13
00h
R/W
0000h
04h
R/W
00000000h
12
11
Description
Sleep Enable Indicator. If SLP_EN (ACPI I/O Offset 08h[13]) was written to a 1, then
this bit reads high. If this bit is written to a 1, the Sleep sequence is aborted. Writing a 0
to this bit has no effect. This bit always clears on a Sleep or Standby wakeup.
Reserved. By convention write 0. Reads return value written.
Sleep Write Enable. Must be high in order to change bits 12 and [11:0]
(SLP_DELAY_EN and SLP_DELAY). Reads of this bit always return 0.
Sleep Delay Enable. Must be high to enable the delay specified in bits [11:0]
(SLP_DELAY). Reads return value written.
Sleep Delay. Indicates the number of 3.57954 MHz clock edges to wait before begin-
ning the Sleep or Standby process as defined by SLP_EN (ACPI I/O Offset 08h[13]).
Bit 12 (SLP_DELAY_EN) must be high to enable this delay. Reads return the value writ-
ten.
Description
Reserved. By convention write 0, but may write anything.
Sleep X Assert and Delay Enable. Must be high to assert the SLEEP_X ball and to
enable its assert delay specified in bits [29:0] (SLPX_DELAY).
(Continued)
10
PM_SCXA Bit Descriptions
PM_SSD Bit Descriptions
PM_SCXA Register Map
PM_SSD Register Map
9
8
SLPX_DELAY
487
7
SLP_DELAY
6
5
9
4
8
7
3
6
5
2
4
3
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