cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 502

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cs5535

Manufacturer Part Number
cs5535
Description
Geode Cs5535 Companion Multi-function South Bridge
Manufacturer
National Semiconductor Corporation
Datasheet

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Flash Controller Register Descriptions
5.19.1 Flash Controller Specific MSRs
5.19.1.1
MSR Address
Type
Reset Value
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
816h-FFFh
000h-7FFh
800h-80Eh
801h-80Fh
Any Even
Any Odd
31:8
Memory
between
between
Address
Address
Bit
Offset
Flash
810h
815h
811h
812h
813h
814h
NOR Flash Control (NORF_CTL)
Name
RSVD
0Dh-0Fh
00h-03h
Offset
51400018h
R/W
00000000h
Flash
07h,
0Ah
0Bh
0Ch
04h
05h
06h
08h
09h
I/O
Table 5-70. Flash Controller Native Registers Summary
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
---
Width
(Bits)
RSVD
NORF_CTL Bit Descriptions
---
8
8
8
8
8
8
8
8
8
NORF_CTL Register Map
Register Name
NAND Device Data (NAND_DATA)
NAND Control Register (NAND_CTL)
NAND I/O (NAND_IO)
NAND Status (NAND_STS)
NAND ECC Control
(NAND_ECC_CTL)
ECC parity registers contain 22 parity
bits. The bit location and definition fol-
lows the SmartMedia Physical Format
Specifications.NAND ECC LSB Line
Parity (NAND_ECC_LSB)
NAND ECC MSB Line Parity
(NAND_ECC_MSB)
NAND ECC Column Parity
(NAND_ECC_COL)
NAND Line Address Counter
(NAND_LAC)
Reserved. Reads return 0. Writes
have no effect.
(Continued)
502
9
8
7
Undefined
Reset
Value
6
FFh
FFh
FFh
01h
00h
0xh
04h
00h
---
5
4
3
Reference
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Revision 0.8
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