cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 495

• Manufacturer Part Number: cs5535
• Description: Geode Cs5535 Companion Multi-function South Bridge
• Manufacturer: National Semiconductor Corporation

Revision 0.8
PMC Register Descriptions
5.18.3.13 PM Working Auxiliary Assert Delay from Standby Wakeup (PM_WKXA)
PMS I/O Offset
Type
Reset Value
Reads always return the value written, except for RSVD bits [29:20].
5.18.3.14 PM Fail-Safe Delay and Enable (PM_FSD)
PMS I/O Offset
Type
Reset Value
Reads always return the value written, except for RSVD bits [29:20].
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
29:20
19:0
19:0
Bit
Bit
31
30
Name
RESET_DELAY
Name
WORK_AUX_
LOCK
WORK_AUX_EN
RSVD
WORK_AUX_
DELAY
3Ch
R/W
00000000h
40h
R/W
00000000h
RSVD
Description
Reset De-assert Delay. Indicates the number of 32 kHz clock edges to continue
asserting RESET_OUT# from Standby Wakeup. Default value is 8 ms. This delay starts
only if the RESET_WORK# input is de-asserted and the internal Low Voltage Detect
circuit detects normal operating voltages on V
3.6 "Reset Considerations" on page 58 for further details regarding reset conditions.)
Bit 30 (RESET_EN) must be high to enable this delay.
Reset will be applied to the system for the longer of this value or until the internal Low
Voltage Detect circuit detects normal operating voltages on V
Description
Working Auxiliary Lock. After this bit is set, the value in this register can not be
changed until RESET_STAND# is applied.
Working Auxiliary Delay Enable. Must be high to enable the delay specified in bits
[19:0] (WORK_AUX_DELAY). If this bit is low, the WORK_AUX output is uncondition-
ally asserted at Standby wakeup. If WORK_AUX was not de-asserted going into
Standby, then this control is a “don’t care”.
Reserved. By convention write 0, but may write anything. Reads return 0.
Working Auxiliary Assert Delay. Indicates the number of 32 kHz clock edges to wait
from Standby wakeup before asserting the WORK_AUX output. Bit 30
(WORK_AUX_EN) must be high to enable this delay.
May be programmed to assert before or after RESET_OUT# de-asserts.
The Standby wakeup event is not recognized until Normal (NWKD) or Abnormal
(AWKD) to Work Delay expires, if those delays are enabled. (See PMS I/O Offset 4Ch
and 50h for details regarding the NWKD and AWKD registers.)
PM_RD Bit Descriptions (Continued)
(Continued)
PM_WKXA Bit Descriptions
PM_WKXA Register Map
495
WORK_AUX_DELAY
CORE
. (Default = 00100h.) (See Section
9
8
7
CORE
6
5
4
3
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1
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