cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 497

• Manufacturer Part Number: cs5535
• Description: Geode Cs5535 Companion Multi-function South Bridge
• Manufacturer: National Semiconductor Corporation

Revision 0.8
PMC Register Descriptions
5.18.3.16 PM Power-Safe Delay and Enable (PM_PSD)
PMS I/O Offset
Type
Reset Value
Reads always return the value written, except for RSVD bits [29:20].
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
29:20
19:0
19:0
Bit
Bit
31
30
Name
THRM_DELAY
Name
LOWBAT_LOCK
LOWBAT_EN
RSVD
LOWBAT_DELAY
48h
R/W
00000000h
RSVD
Description
Thermal Delay. If the Thermal Alarm (THRM_ALRM#) input signal is asserted for
THRM_DELAY number of 32 kHz clock edges, then unconditionally de-assert WORK-
ING and WORK_AUX to remove Working power. If THRM_ALRM# is still asserted at
wakeup, hold in Standby state until THRM_ALRM# is de-asserted.
THRM_ALRM# needs to be asserted for at least one 32 kHz clock edge for this func-
tion to work properly. A less than one 32 kHz clock edge pulse on THRM_ALRM# may
not be registered.
The delay restarts if THRM_ALRM# de-asserts and then asserts again. If
THRM_ALRM# is asserted, the delay restarts anytime THRM_DELAY (this bit) is writ-
ten.
Since the thermal alarm resides in the Working domain, the THRM_ALRM# input signal
is blocked (de-asserted) when in Standby state. The result is the Standby state could
not be held if the thermal alarm is still asserted at wakeup. Once out of Standby, the
thermal alarm again comes into play. If it is still asserted, its timer would start again.
Description
Low Battery Lock. After this bit is set, the value in this register can not be changed
until RESET_STAND# is applied.
Low Battery Enable. Must be high to enable this function.
Reserved. By convention write 0, but may write anything. Reads return 0.
Low Battery Delay. If the Low Battery input LOW_BAT# (GPIO25) is asserted for
LOWBAT_DELAY number of 32 kHz clock edges, then unconditionally de-assert
WORKING and WORK_AUX to remove Working power. If LOW_BAT# is still asserted
at wakeup, hold in Standby state until LOW_BAT# is de-asserted.
LOW_BAT# needs to be asserted for at least one 32 kHz clock edge for this function to
work properly. A less than one 32 kHz clock edge pulse on the LOW_BAT# input may
not be registered.
The delay restarts if LOW_BAT# de-asserts and then asserts again. If LOW_BAT# is
already asserted, the delay restarts anytime LOWBAT_DELAY (this field) is written.
PM_TSD Bit Descriptions (Continued)
(Continued)
PM_PSD Bit Descriptions
PM_PSD Register Map
497
LOWBAT_DELAY
9
8
7
6
5
4
3
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2
1
0