cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 480

• Manufacturer Part Number: cs5535
• Description: Geode Cs5535 Companion Multi-function South Bridge
• Manufacturer: National Semiconductor Corporation

www.national.com
PMC Register Descriptions
Note 1. A wakeup event can come from any event enabled by PM1_EN (ACPI I/O Offset 02h) or PM_GPE0_EN (ACPI I/O
Note 2. After starting a Sleep sequence, software would normally spin by entering a polling loop on the WAK_FLAG. This
14:12
Bit
7:6
3:1
15
11
10
9
8
5
4
0
Offset 1Ch). A wakeup will occur even if the SCI is not mapped to an ASMI or IRQ.
bit is normally (software has cleared it from last Sleep) 0 before starting a Sleep sequence. The Sleep sequence
puts the processor in Suspend while it is spinning. When the sequence brings the processor out of Suspend, the
WAK_FLAG bit is set. The Sleep sequence starts when SLP_EN (ACPI I/O Offset 08h[13]) is written to a 1.
Name
WAK_FLAG
(Note 1, Note 2)
RSVD
IGNORE
RTC_FLAG
SLPBTN_FLAG
PWRBTN_FLAG
RSVD
GBL_FLAG
BM_FLAG
RSVD
TMR_FLAG
Description
Wakeup Event Flag. This bit is set high by the hardware when any wakeup event
occurs. Write 1 to clear; writing 0 has no effect.
Reserved. By convention write 0, but other values are “don’t care”. Reads always
return 0.
Ignore. By ACPI convention not used by software. Reads always return 0.
To support the Global Status Lock Flag bit, writing a 1 to this bit sets bit 5. Writing a 0
has no effect.
Real-Time Clock Alarm Flag. This bit is set high by the hardware when the RTC gen-
erates an alarm. If RTC_EN (ACPI I/O Offset 02h[10]) is high, an SCI is generated.
Write 1 to clear; writing 0 has no effect.
Sleep Button Flag. This bit is set high by the hardware when the “sleep button” is
pushed. If SLPBTN_EN (ACPI I/O Offset 02h[9]) is high, an SCI is generated. Write 1
to clear; writing 0 has no effect.
Power Button Flag. This bit is set high by the hardware when the “power button” is
pushed. If PWRBTN_EN (ACPI I/O Offset 02h[8]) is high, an SCI is generated. Write 1
to clear; writing 0 has no effect.
Reserved. By convention write 0, but other values are “don’t care”. Reads always
return 0.
Global Lock Flag. If high, indicates that the BIOS released control of Global Lock Sta-
tus bit. This bit is cleared by writing a 1 to it. This bit is set by writing a 1 to bit 11
(IGNORE). If GLB_EN (ACPI I/O Offset 02h[5]) is high, an SCI is generated.
Bus Master Flag. This bit indicates a master has requested the bus. Used to indicate a
possible incoherent cache when the processor is in state C3. This function is not sup-
ported because the CS5535 does not support the C3 state.
Reserved. By convention write 0, but other values are “don’t care”. Reads always
return 0.
Timer Carry Flag. This bit is set high by the hardware anytime the Power Management
Timer rolls over from all 1s back to 0. If TMR_EN (ACPI I/O Offset 02h[0]) is high, an
SCI is generated when the rollover occurs. Write 1 to clear; writing 0 has no effect.
By convention write 0, but other values are “don’t care”. Reads return 0.
(Continued)
PM1_STS Bit Descriptions
480
Revision 0.8