cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 499
cs5535
Manufacturer Part Number
cs5535
Description
Geode Cs5535 Companion Multi-function South Bridge
Manufacturer
National Semiconductor Corporation
Datasheet
1.CS5535.pdf
(555 pages)
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Revision 0.8
PMC Register Descriptions
5.18.3.18 PM Abnormal Work Delay and Enable (PM_AWKD)
PMS I/O Offset
Type
Reset Value
Reads always return the value written, except for RSVD bits [29:20]. This register applies to Abnormal Standby state entry.
5.18.3.19 PM Standby Status and Control (PM_SSC)
PMS I/O Offset
Type
Reset Value
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
29:20
31:19
19:0
Bit
Bit
31
30
18
17
16
Name
AWKD_LOCK
AWKD_EN
RSVD
AWKD_DELAY
Name
RSVD
PI (RO)
CLEAR_PI
SET_PI
50h
R/W
00000000h
54h
R/W
00000001h
RSVD
RSVD
Description
Reserved. Reads return 0; writes are don’t care.
Power Immediate (Read Only). Reads return current value of Power Immediate bit.
Clear Power Immediate. Write 1 to clear the read only Power Immediate bit (bit 18).
Writing 0 has no effect. Reads return 0.
Set Power Immediate. Write 1 to set the read only Power Immediate bit (bit 18). Writ-
ing 0 has no effect. Reads return 0.
Description
Abnormal Work Delay Lock. After this bit is set, the value in this register can not be
changed until RESET_STAND# is applied.
Abnormal Work Delay Enable. Must be high to enable this function.
Reserved. By convention write 0, but may write anything. Reads return 0.
Abnormal Work Delay Delay. If the standby state is entered abnormally,
AWKD_
is allowed to be entered again, that is, a Standby Wakeup recognized.
(Continued)
PM_AWKD Bit Descriptions
DELAY number of 32 kHz clock edges must pass before the Working state
PM_SSC Bit Descriptions
PM_AWKD Register Map
PM_SSC Register Map
499
RSVD
AWKD_DELAY
9
9
8
8
7
7
6
6
5
5
4
4
3
3
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2
1
1
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