cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 32

• Manufacturer Part Number: cs5535
• Description: Geode Cs5535 Companion Multi-function South Bridge
• Manufacturer: National Semiconductor Corporation

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Signal Definitions
2.2.1
Signal Name
SUSP#
CIS
SUSPA#
IRQ13
V
V
V
LVD_EN#
BAT
SS_VBAT1
SS_VBAT2
System Interface Signals (Continued)
Ball No.
(Continued)
N1
C4
C7
P3
K2
A3
B2
AGND
Type
Wire
Wire
O
O
I
I
Description
Suspend. This signal goes low in response to events as determined
by the CS5535’s internal power management logic. It requests the
GX2 to enter the Suspend state. This is the default state for this ball at
reset. Not used in normal operation.
CPU Interface Serial. A 20-bit serial status word is output on this ball,
synchronized to PCI_CLK. Data changes on the rising edge and is
stable on the falling edge of PCI_CLK. This word is output whenever
one of the internally-monitored signals changes states. See Section
4.2.14 "CPU Interface Serial (CIS)" on page 79 for details. Used in
normal operation.
Suspend Acknowledge. This input signal is driven low by the GX2
processor when it has successfully entered the Suspend state.
Interrupt Request Level 13. Floating Point error. Connect directly to
IRQ13 of the GX2 processor.
Real-Time Clock Battery Back-Up. Battery voltage on this ball
keeps the real-time clock and CMOS RAM circuits continuously pow-
ered.
If not used, tie to ground.
2.4-3.6V, typical 3.0V.
10 µA max.
This ball incorporates a reverse bias protection diode on-chip.
There is no need for an external diode.
Real-Time Clock Battery Grounds 1 and 2
Low Voltage Detect Enable. LVD_EN# enables/disables the on-chip
low voltage detect circuit. When disabled, the external subsystem
must assert RESET_STAND# as Standby power is applied and must
assert RESET_WORK# as Working power is applied. When LVD is
enabled, use of these two resets are optional. Generally,
RESET_STAND# would be tied high (not used) while
RESET_WORK# would be tied to a reset output that is typically avail-
able from the power supply. However, a system could just have a sim-
ple regulator circuit and also tie RESET_WORK# high.
Tie to V
5 µAs typical.
SS
32
to enable. Tie to V
IO_VSB
to disable.
Revision 0.8