cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 538
cs5535
Manufacturer Part Number
cs5535
Description
Geode Cs5535 Companion Multi-function South Bridge
Manufacturer
National Semiconductor Corporation
Datasheet
1.CS5535.pdf
(555 pages)
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Electrical Specifications
Note 1. Per the ATA/ATAPI-5 spec, these signals utilize Output Reference Timing (see Figure 6-3 on page 531) relative to
Note 2. t
Note 3. These signals use Input Reference Timing (see Figure 6-4 on page 531). Figure 6-7 illustrates their relationship
Note 4. Per the ATA/ATAPI-5 spec, these signals utilize Input Reference Timing (see Figure 6-4 on page 531) relative to
Note 5. For IDE_IRQ0, GPIO2 configured: AUX_IN and Input Enable = 1; Output Enable, AUX_OUT_1, and AUX_OUT_2
Signal
IDE_DACK0#,
IDE_HDMA_RDY,
IDE_STOP,
IDE_IOW0
IDE_DDMA_DS
IDE_DATA[15:0]
IDE_DREQ0#
IDE_IRQ0
IDE_DEVICE_DATA_STROBE
IDE_DATA[15:0]
IDE_IOR0# and IDE_IOW0#. However, the IDE Controller uses the MHZ66_CLK edges to make output changes,
that when taken together, meet all the timing requirements of the referenced spec. Therefore, t
ified and tested relative to the MHZ66_CLK.
t
and specified setup and hold times.
IDE_IOR0#. However, the IDE Controller samples the inputs with the MHZ66_CLK at the appropriate points in time
to meet all the timing requirements of the referenced spec.
= 0.
VAL
VAL
min times with load of: 15 pF cap to ground.
max times with load of: 40 pF cap to ground.
t
SETUP
= 5 ns
Table 6-12. IDE UltraDMA Data In Timing Parameters
Parameter
t
Async Input
Sync to
IDE_DDMA_DS
Async Input
Async Input
VAL
(Continued)
Figure 6-7. IDE UltraDMA Data In Timing
t
HOLD
Min
NA
NA
NA
= 5 ns
2
538
see Note
Max
NA
NA
NA
10
Units
ns
ns
ns
ns
ns
Comment/Condition
In Ultra DMA/33 mode, the
IDE_IOR0# signal is redefined as
IDE_HDMA_RDY.
Note 1 and Note 2.
In Ultra DMA/33 mode, the
IDE_RDY0 signal is redefined as
IDE_DDMA_DS.
Note 3.
Note 3.
No clock reference. Note 4.
Note 4 and Note 5.
VAL
times are spec-
Revision 0.8
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