cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 312
cs5535
Manufacturer Part Number
cs5535
Description
Geode Cs5535 Companion Multi-function South Bridge
Manufacturer
National Semiconductor Corporation
Datasheet
1.CS5535.pdf
(555 pages)
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DIVIL Register Descriptions
5.6.2.8
MSR Address
Type
Reset Value
See Section 4.6.1 "LBARs and Comparators" on page 97 for operational details. The Power Management Support registers
take 128 bytes of I/O space.
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:49
47:44
43:33
31:17
63:49
15:5
Bit
4:0
Bit
48
32
16
48
Local BAR - Power Management Support (DIVIL_LBAR_PMS)
Name
RSVD
RSVD
IO_MASK
RSVD
LBAR_EN
RSVD
RSVD
BASE_ADDR
RSVD
Name
RSVD
RSVD
5140000Fh
R/W
00000000_00000000h
RSVD
RSVD
RSVD
RSVD
Description
Reserved. Reads return 0; writes have no effect.
Reserved. Always write 0.
I/O Address Mask Value. See discussion in Section 4.6.1 "LBARs and Comparators"
on page 97
Reserved. Reads return 0; writes have no effect.
LBAR Enable.
0: Disable LBAR.
1: Enable LBAR.
Reserved. Reads return 0; writes have no effect.
Reserved. Always write 0.
Base Address in I/O Space. See discussion in Section 4.6.1 "LBARs and Compara-
tors" on page 97
Reserved. Reads return 0; writes have no effect.
Description
Reserved. Reads return 0; writes have no effect.
Reserved. Always write 0.
DIVIL_LBAR_ACPI Bit Descriptions
DIVIL_LBAR_PMS Bit Descriptions
(Continued)
DIVIL_LBAR_ACPI Register Map
DIVIL_LBAR_PMS Register Map
312
IO_MASK
IO_MASK
BASE_ADDR
BASE_ADDR
9
9
8
8
7
7
RSVD
RSVD
6
6
5
5
4
4
RSVD
3
3
RSVD
2
2
Revision 0.8
1
1
0
0
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