cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 50

• Manufacturer Part Number: cs5535
• Description: Geode Cs5535 Companion Multi-function South Bridge
• Manufacturer: National Semiconductor Corporation

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3.0
3.1
The information in this section provides a basic under-
standing of the architecture used to internally connect
GeodeLink Devices. The actual existence of architecture is
generally invisible to the user and the system programmer.
National Semiconductor Core BIOS software provides all
GeodeLink initialization and support, including related
Model Specific Registers (MSRs). Additionally, this soft-
ware provides a Virtual PCI Configuration Space that
abstracts the architecture to industry standard interfaces.
From this interface, all GeodeLink devices appear in one
PCI multi-function configuration space header on the exter-
nal PCI bus.
3.1.1
This component is based on the GeodeLink packet archi-
tecture. It consists of a set of GeodeLink Devices (GLDs)
and a GeodeLink Control Processor (GLCP) connected
through the GeodeLink Interface Unit (GLIU).
A simplified view of a GLIU connected with three generic
GLDs is illustrated in Figure 3-1. The following points are
relevant:
• All outputs from a GLD to the GLIU are registered.
GEODELINK ARCHITECTURE OVERVIEW
Global Concepts and Features
Introduction
RO - Request Out
DO - Data Out
RO
P2D
HS
Figure 3-1. Simplified GLIU with Generic GeodeLink Devices
GLD1
DO
ARB
RI - Request In
DI - Data In
Data
Mux
RO
HS
GLIU
HS - Handshake
P2D - Physical to Device Descriptors
GLD2
DO
50
• All outputs from the GLIU to a GLD are registered.
• GLD inputs from the GLIU need not be registered but
• All connections between the GLDs and GLIU are dedi-
• The GLIU itself is a GLD and is always Port 0.
The GLIU implements the “bus”. Transactions between
GLDs and GLIUs are conducted with packets. The GLIU
accepts request packets from masters and routes them to
slaves. Similarly, slave response packets are routed back
to the master. The bus is non-blocking. Several requests
can be pending but order is guaranteed. Broadcasts are
not allowed. All packets have one source and one destina-
tion.
3.1.2
The Physical To Device (P2D) descriptors control the rout-
ing of the packets. The descriptors are initialized by soft-
ware at system setup. They establish the address map to
be used by the system. They associate a memory or I/O
address range with a GLIU port.
Furthermore, there are dedicated output registers for
each GLD.
they are buffered at the interface.
cated point-to-point connections with one source and
one load. There are no TRI-STATE buses.
RI
Routing
DI
RO
RI
HS
DI
GLD3
DO
ARB - Arbiter
RI
DI
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