cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 69

no-image

cs5535

Manufacturer Part Number
cs5535
Description
Geode Cs5535 Companion Multi-function South Bridge
Manufacturer
National Semiconductor Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
cs5535-KSZ
Manufacturer:
CIRRUSLOGIC
Quantity:
20 000
Part Number:
cs5535-UDC
Manufacturer:
AMD
Quantity:
20 000
Part Number:
cs5535-UDCF
Manufacturer:
AMD
Quantity:
20 000
Revision 0.8
Global Concepts and Features
8)
9)
10) If there was no Event[Y] at any point above, return to
Note: Step 5 above could occur at any time between step
3.8.3.2
An SSMI event is associated with an I/O space access to a
specific address or range of addresses. If SSMIs are
enabled for the given address, then the hardware traps or
VSA sets EN[n] high. This action sets ASMI[n+1] high
again and causes another CS5535 ASMI.
VSA begins to return to the process interrupted by the
original ASMI, but notes SMI into the processor is still
asserted and returns to step 3.
the interrupted process.
Event
[X]
2 and step 9, or the Event[Y] could come after step
10. Regardless, the same VSA approach is used in
order not to miss any events.
Apparent SSMI
+
FLAG Bits
Other
Native Event
Register
FLAG Bit[x]
D
D
Bit[m]
CI
CI
EN
Q
Q
Event
Figure 3-8. In-Direct ASMI Behavioral Model
[X]
Clear_By_Software
Set_By_Software
Clear_By_Software
ALL
OR
(Continued)
Summary Signal
Native Event
(NESS)
69
blocks access to the target register. The actual register
write and/or read operation is not performed. Generally,
only write operations are trapped, but there are cases of
trapping writes and reads. The CS5535 does not support
SSMIs, however, the CS5535 supports a mechanism
called “Apparent SSMI” using ASMIs. (Hereafter “Apparent
SSMI” is referred to as “SSMI”.)
The CS5535 insures that the ASMI is taken on the I/O
instruction boundary. The ASMI reaches the CPU before a
target ready is signaled on the PCI bus. This action creates
an SSMI because the I/O instruction will not complete
before ASMI reaches the CPU. VSA software then exam-
ines the GLPCI_SB GLD_SMI_MSR to determine if an
SSMI has occurred from an I/O trap.
+
Other ASMI
FLAG Bits
SMI MSR
FLAG Bit[n+1]
Bit[n]
D
D
EN
CI
CI
Q
Q
ASMI
[n+1]
ALL
Clear_By_Software
Set_By_Software
Clear_By_Software
OR
GLD ASMI
www.national.com

Related parts for cs5535