MPC564CZP40 Freescale Semiconductor, MPC564CZP40 Datasheet - Page 1013

• Manufacturer Part Number: MPC564CZP40
• Description: IC MPU 32BIT W/CODE COMP 388PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564CZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

24.8.2.4.4
For compressed code support, six additional bits indicate the starting bit address within the word of the
compressed instruction. The program trace indirect branch synchronization with compressed code
message has the following formats depending on the setting of MC[PTSM]:
Bit pointer format is shown in
24.8.2.4.5
When more than 256 instructions have run without a branch being taken a program trace resource full
message will be generated that indicates the maximum I-CNT value has been reached. The I-CNT field
has a maximum width of 8 bits.
Freescale Semiconductor
:
:
[6 bits]
Figure 24-30. Indirect Branch Synchronization Message Format with Compressed
Figure 24-31. Indirect Branch Synchronization Message Format with Compressed
Figure 24-28. Direct Branch Synchronization Message Format with Compressed
Figure 24-29. Direct Branch Synchronization Message Format with Compressed
TCODE (61)
Indirect Branch Synchronization Message with Compressed Code
Resource Full Message
[6 bits]
[6 bits]
TCODE (60)
TCODE (60)
[6 bits]
TCODE (60)
Figure 24-22
MPC561/MPC563 Reference Manual, Rev. 1.2
Max Length = 35 bits
Min Length = 13 bits
Max Length = 43 bits
Min Length = 14 bits
Max Length = 43 bits
Min Length = 14 bits
[6 bits]
Sequence Count
Sequence Count
Bit Pointer
Max Length = 35 bits
Min Length = 13 bits
Bit address
[1-8 bits]
[1-8 bits]
Code (PTSM = 0)
Code (PTSM = 1)
Code (PTSM = 1)
and bit address format is described in
Code (PTSM - 0)
[6 bits]
Full target address
[1 – 23 bits]
Bit address
Bit Pointer
[6 bits]
Full target address
[6 bits]
[1 – 23 bits]
Full target address
Full target address
[1 – 23 bits]
[1 – 23 bits]
Table
24-26.
READI Module
24-45