MPC564CZP40 Freescale Semiconductor, MPC564CZP40 Datasheet - Page 1187

• Manufacturer Part Number: MPC564CZP40
• Description: IC MPU 32BIT W/CODE COMP 388PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564CZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

D.12 Fast Quadrature Decode TPU3 Function (FQD)
FQD is a position-feedback function for motor control. It provides the RCPU with a 16-bit free-running
position counter by decoding the two signals from a slotted encoder. FQD incorporates a “speed switch”
that disables one of the channels at high speed, allowing faster signals to be decoded. Furthermore, every
counter update provides a time stamp that is useful for interpolating position and determining velocity at
low speed or in instances that implement low-resolution encoders. The ITC function handles the third
index channel provided by some encoders. See Freescale TPU Progamming Note Fast Quadrature Decode
TPU Function (FQD), (TPUPN02/D).
Figure D-22
secondary channels.
Freescale Semiconductor
and
Figure D-23
show the host interface areas for the FQD function for primary and
Figure D-21. MULTI Parameters — PWM_IN
MPC561/MPC563 Reference Manual, Rev. 1.2
CONTROL BITS
See
PRAM Address Offset Map.
Table 19-24
TPU3 ROM Functions
for the
D-35