MPC564CZP40 Freescale Semiconductor, MPC564CZP40 Datasheet - Page 249

• Manufacturer Part Number: MPC564CZP40
• Description: IC MPU 32BIT W/CODE COMP 388PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564CZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

If programmed to generate an interrupt, the SWT and external pin IRQ0 always generate an NMI,
non-maskable interrupt to the RCPU.
Freescale Semiconductor
Levels[0:7]
ilbs[0:1]
IRQ[0:7]
IMB3
The RCPU takes the system reset exception when an NMI is asserted, the
external interrupt exception for any other asserted interrupt request, and the
decrementer exception when the decrementer MSB changes from 0 to 1.
UIMB
Figure 6-3. MPC561/MPC563 Interrupt Structure
U-bus INT Levels [0:7]
[EICEN, LPMASKEN]
MPC561/MPC563 Reference Manual, Rev. 1.2
EDGE
DET
Change
of Lock
SIUMCR
Timers,
Sequencer
IMBIRQ
LPMASKEN
NOTE
Level 7
Level 6
Level 4
Level 3
Level 2
Level 1
Level 0
Level5
SWT
DEC
I7
I6
I5
I4
I3
I2
I1
I0
I0
Internal
GEN
Bus
NMI
16
48
DEC_IRQ to RCPU
Wake up from
low-power mode
NMI to RCPU
System Configuration and Protection
MUX
USIU
EICEN
Offset in
branch table
IREQ to RCPU
IRQOUT
6
BBC/IMPU
6-9