MPC564CZP40 Freescale Semiconductor, MPC564CZP40 Datasheet - Page 897

IC MPU 32BIT W/CODE COMP 388PBGA

MPC564CZP40

Manufacturer Part Number
MPC564CZP40
Description
IC MPU 32BIT W/CODE COMP 388PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564CZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC564CZP40
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 22
CALRAM Operation
The calibration static random access memory (CALRAM) module provides the MPC561/MPC563 with a
general purpose memory that may be read from or written to as either bytes, half-words, or words. In
addition to this, a portion of the CALRAM, called the overlay region, can be used for calibration.
Calibration in this context is defined as overlaying portions of the U-bus Flash with a portion of the
CALRAM array. During normal Flash access, the RISC central processing unit (RPCU) reads data from
U-bus Flash (through L-bus and L2U) as shown in
providing the data, the overlay regions of CALRAM provide the data to the RPCU.
22.1
Standard CALRAM features are listed below:
Special overlay features are:
Freescale Semiconductor
One-clock accesses
— Two-cycle access for power savings
Byte, half-word (16-bits), or word (32-bit) read/write accesses
Each 8-Kbyte block has individual protection control bits.
Low power standby operation for data retention
Eight overlay regions; each can be programmed to be 4-, 16-, 32-, 64-, 128-, 256-, or 512-bytes
long
Each overlay region size can be forced to 4 bytes long
Data driven from the CALRAM module for overlay access has the same timing as the data that
would have come from the U-bus Flash
Overlay is for data read from the U-bus Flash space and does not affect instruction fetches from
the Flash
Overlay block is naturally aligned
— For example, 128-byte block is 128-byte aligned
Normal access to overlaid portion of CALRAM array can be made to generate an error (machine
check) if so configured
Features
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure
22-1. During calibration access, instead of Flash
22-1

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