MPC564CZP40 Freescale Semiconductor, MPC564CZP40 Datasheet - Page 142

IC MPU 32BIT W/CODE COMP 388PBGA

MPC564CZP40

Manufacturer Part Number
MPC564CZP40
Description
IC MPU 32BIT W/CODE COMP 388PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564CZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC564CZP40
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Signal Descriptions
2-44
1
2
3
4
5
6
7
8
9
10
11
IRAMSTBY
Signal List
This column contains only the list of signals and should not be confused with the actual pin name. For actual pin
names, see
For 5-V outputs, the left hand value represents slew rate control off, and the right hand value represents slew rate
control on. For 2.6-V outputs, the left hand value represents loads that are full drive, and the right hand value
represents loads that are half drive.
Care should be taken that neither a pull-up to greater than 3.1 V or an external output that can drive greater than
3.1 V is connected to this pin while the 2.6-V driver is enabled.
Pull-up/pull-down is active when pin is defined as an input and/or during reset, therefore, output enable is negated.
This also means that external pull-up/pull-down is NOT required unless specified.
For this 5-V output, a drive load of 200 pf is possible but with a rise/fall time of 300 ns.
During reset, the output enable to the pad driver is negated and the PD is active. After reset is negated, the PD is
disabled.
2.6-V outputs cannot be connected to a pull-up or driver greater than 3.1 V.
This pin requires a pull-up to 2.6 V if interrupts are ever enabled for this IRQ input.
This signal also includes the MDO5 function on the K27S mask set of the MPC561.
The MODCK[1:3] are shared functions with IRQ[5:7]. If IRQ[5:7] are used as interrupts, the interrupt source should
be removed during PORESET/TRST to insure the MODCK pins are in the correct state on the rising edge of
PORESET/TRST.
These pins are powered by KAPWR (keep-alive power supply). Any pull-ups on these pins should pull-up to
KAPWR.
KAPWR
VDDSYN
VSSSYN
ALTREF
NVDDL
QVDDL
VDDH
VDDA
VSSA
VDD
VRH
VSS
VRL
11
19
1
Appendix F, “Electrical
Voltage
≥2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
0 V
5 V
5 V
0 V
5 V
5 V
0 V
Table 2-14. MPC561/MPC563 Signal Reset State (continued)
Controlled
Slew Rate
Option?
MPC561/MPC563 Reference Manual, Rev. 1.2
Characteristics.”
QADC64E Power Supplies
Drive
Load
(pF)
Global Power Supplies
USIU Power Supplies
2
Reset State
Hysteresi
Enabled?
s
NVDDL
VDDH
VDDI
VSS
KAPWR
IRAMSTBY
QVDDL
VDDSYN
VSSSYN
VRH
VRL
ALTREF
VDDA
VSSA
Function After HRESET,
PORESET/TRST
Freescale Semiconductor

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