MPC564CZP40 Freescale Semiconductor, MPC564CZP40 Datasheet - Page 1163

IC MPU 32BIT W/CODE COMP 388PBGA

MPC564CZP40

Manufacturer Part Number
MPC564CZP40
Description
IC MPU 32BIT W/CODE COMP 388PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564CZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC564CZP40
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor
0
ADDRESS OFFSETS
1
0x30XXWA
0x30XXWC
0x30XXWE
0x30XXW0
0x30XXW2
0x30XXW4
0x30XXW6
0x30XXW8
2
0
0
0
3
1
1
1
0
0
cHost Sequence
cHost Service Request
cChannel Priority
cChannel Interrupt Status
= Written By RCPU
= Written By TPU
Channel Function Select
Channel Interrupt Enable 0 – Channel Interrupt Disabled
NAME
0
1
MPC561/MPC563 Reference Manual, Rev. 1.2
2
3
Figure D-6. FQM Parameters
xxxx – FQM Function Number. Assigned
during microcode assembly. See
Table D-1
00 – Begin with Falling Edge,
01 – Begin with Falling Edge, Continuous Mode
10 – Begin with Rising Edge, Single-Shot Mode
11 – Begin with Rising Edge, Continuous Mode
00 – No Host Service (Reset Condition)
01 – Not Used
10 – Initialize
11 –Not Used
00 – Disabled
01 – Low Priority
10 – Medium Priority
11 – High Priority
1 – Channel Interrupt Enabled
0 – Channel Interrupt Not Asserted
1 – Channel Interrupt Asserted
4
PARAMETER RAM
IN_WINDOW_ACCUMULATOR
CONTROL BITS
Single-Shot Mode
= Written by RCPU and TPU
= Unused Parameters
5
CHANNEL_CONTROL
PULSE_COUNT
WINDOW_SIZE
6
7
OPTIONS
BITS
8
9
10 11 12 13 14 15
W = Primary Channel Number
For address offsets: XX=41 for
TPU_A, 45 for TPU_B
YY=40 for TPU_A,
44 for TPU_B
0x30YY1C – 0x30YY1E
0x30YY0C – 0x30YY12
0x30YY18 – 0x30YY1A
0x30YY14 – 0x30YY16
ADDRESSES
0x30YY0A
0x30YY20
TPU3 ROM Functions
Param 0
Param 1
Param 2
Param 3
Param 4
Param 5
Param 6
Param 7
D-11

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