MPC564CZP40 Freescale Semiconductor, MPC564CZP40 Datasheet - Page 962

• Manufacturer Part Number: MPC564CZP40
• Description: IC MPU 32BIT W/CODE COMP 388PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564CZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Development Support
Note: LCTRL1 is cleared following reset.
23.6.10 L-Bus Support Control Register 2
23-48
SRESET
SRESET
16:17
18:19
22:25
26:29
30:31
Field LW0EN
Field
Addr
Bits
20
21
LADC
LW1
MSB
16
0
Mnemonic
CGBMSK
CHBMSK
LW1LD
SUSG
SUSH
17
LW0IA
1
CSG
CSH
—
18
Figure 23-23. L-Bus Support Control Register 2 (LCTRL2)
2
LDDC
IADC
Table 23-24. LCTRL1 Bit Descriptions (continued)
LW0
LW1
19
3
Signed/unsigned operating mode
Signed/unsigned operating mode
Byte mask for 1st L-data comparator 0000 all bytes are not masked
Reserved
Compare size, comparator G
Compare size, comparator H
for comparator G
for comparator H
Byte mask for 2nd L-data
comparator
MPC561/MPC563 Reference Manual, Rev. 1.2
NOMSK
BRK
20
LW0LA
4
Description
21
5
LADC
LW0
0000_0000_0000_0000
0000_0000_0000_0000
22
6
SPR 157
23
7
LW0LD
24
—
8
00 reserved
01 word
10 half word
11 byte
(Must be programmed to word for floating point
compares)
0 unsigned
1 signed
(Must be programmed to signed for floating
point compares)
0001 the last byte of the word is masked
.
.
.
1111 all bytes are masked
LDDC
LW0
25
9
LW1
EN
10
26
11
27
LW1IA
Function
DLW0
—
EN
12
28
Freescale Semiconductor
DLW1
IADC
LW1
EN
13
29
SLW0
EN
14
30
LW1LA
SLW1
LSB
EN
15
31