MPC564CZP40 Freescale Semiconductor, MPC564CZP40 Datasheet - Page 1014

• Manufacturer Part Number: MPC564CZP40
• Description: IC MPU 32BIT W/CODE COMP 388PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564CZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

READI Module
The total instruction count can be found by adding 256 for each program trace full message received to the
sequence count of the direct or indirect branch trace message that follows the resource full message. The
program trace full message has the following format:
At this time, the program trace sequential count full code is the only defined option for this message.
24.8.2.5
Branch trace error messages are explained within applicable functional areas, such as data trace,
watchpoint, and program trace sections of this chapter.
24.8.2.6
The relative address feature is compliant with the IEEE-ISTO 5001 - 1999 recommendations, and is
designed to reduce the number of bits transmitted for addresses of indirect branch messages.
The address transmitted is relative to the address of the previous branch trace message. It is generated by
XORing the new address with the previous address, and then using only the results up to the most
significant ‘1’ in the result. To recreate this address, an XOR of the (most-significant 0-padded) message
address with the previously decoded address gives the current address.
address is generated and how it can be used to recreate the original address.
24-46
Error Messages
Relative Addressing
Error Code
0001-1111
0000
Figure 24-32. Program Trace Full Message Format
[6 bits]
MPC561/MPC563 Reference Manual, Rev. 1.2
TCODE (27)
Program Trace Sequential Count Full
Vendor Defined or Reserved
Table 24-29. Resource Codes
Max Length = 10 bits
Min Length = 7 bits
[1 - 8 bits]
Resource Code
Description
Figure 24-33
shows how a relative
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