ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 184

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

IBM3206K0424
IBM Processor for Network Resources
Memory Controlling Entities
Entity 5: The DRAM Controllers (COMET/PAKIT)
This section describes the function of the COMET/PAKIT entities. COMET is the memory controller for Con-
trol Memory, and PAKIT is the memory controller for Packet Memory.
Each controller can support the following types of memory:
Note: For any memory configuration, modules must be selected such that the loading on any memory net
(including card wiring) does not exceed 120pF.
The number of column address lines is programmable, allowing both DRAMs with symmetric address (same
number of row and column address lines) and asymmetric address (typically having more row than column
address lines).
If using SDRAM, the memory may be operated as having one or two arrays. The arrays are differentiated by
their chip selects. If the memory is configured to have two arrays, the memory's address range is split equally
between the two arrays.
Memory checking can be enabled/disabled, and the method of checking selected can be either ECC or parity.
IF ECC is selected, seven data bits are used for ECC over the 32 data bits. If parity is selected, four data bits
are used to provide parity over the 32 data bits.
COMET/PAKIT are designed so that memory contents are preserved over a reset. If the IBM3206K0424 is
reset while a memory write cycle is in progress, the cycle is completed in an orderly fashion to ensure that
valid ECC/parity is written. Memory timings are not violated when reset goes active. Refresh is maintained
during the reset.
The DRAM Controllers (COMET/PAKIT)
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• Synchronous DRAMs running at 133MHz (7.5 ns cycle time) with a CAS latency of two or three and a
• Synchronous SRAM running at 133MHz (7.5 ns cycle time) with a read latency of two and a write latency
burst length of one or two. Memory sizes of 4MB, 8MB, 16MB, and 32MB are supported. Please note that
the cycle time of the SDRAM clock is a constant on the IBM3206K0424. Any SDRAM part selected must
be capable of running at 133MHz or faster at CAS latency 2 or 3.
of zero or two. Memory sizes of 1MB, 2MB, 4MB, and 8MB are supported.
pnr25.chapt04.01
August 14, 2000
Preliminary