ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 50

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

IBM3206K0424
IBM Processor for Network Resources
NPBUS Pin Descriptions
NPBUS
Page 50 of 676
Quantity
1. S/T/S = a sustained tri-state pin owned and driven by one and only one agent at a time. The agent that drives the S/T/S pin low
1
1
1
1
1
8
1
1
must drive it high for at least one clock before letting it float. A new agent cannot start driving a S/T/S signal any sooner that one
clock after the previous owner tri-states it. A pullup is required to sustain the inactive state until another agent drives it and must be
provided by the central resource.
PBDATA(7-0)
PBPHYRST
PBADDR17
PBRNWRT
PBRDRDY
Pin Name
PBSDATA
PBINTRA
PBSCLK
Input/Output
Output or
Input or
Output
S/T/S
Output
Output
Output
Output
Input
Data
(Continued)
1
Address Send 17
Clock for the I
EPROM accesses
Read or Write
Implements the network
safety features of the
device
Pin Function
2
C serial
Supplies address 17 to an external EPROM.
This is the data bit that connects to the external serial EPROM to
read from or write to. It must have a pullup resistor attached and
supports the I
from 256 to 2K bytes. After reset, the IBM3206K0424 will start
accessing the optional on-card serial EPROM and do the chip ini-
tialization function. If this chip is pulled down (or no pullup), the
IBM3206K0424 will assume that no serial EPROM is attached and
will go try to fetch from a parallel EPROM.
This pin allows the IBM3206K0424 to read from or write to internal
registers of the PHY parts. This signal acts as the write strobe
when talking to PMC-Sierra chips such as the Suni-Lite.
This pin allows the IBM3206K0424 to read from or write into inter-
nal registers of the PHYs by acting as a data acknowledge signal
from the memory slaves. This signal acts as the read strobe when
talking to PMC-Sierra chips such as the Suni-Lite.
The PB-Bus is an eight-bit wide bidirectional data bus used to inter-
face the PHYs to the IBM3206K0424. When a data transfer is not
happening, the lower four bits act as MLED(3-0) - four control pins
that, under register bit control, can drive general status to LED
devices.
This input from PHY A is an attention line that, when low, indicates
that one or more unmasked flags are set in the status registers of
PHY 1.
If additional PHY parts are added, they should also dot their inter-
rupt line onto this input.
This signal implements the network safety features of the
IBM3206K0424. It is the ORed value of RESET and all of the status
bits cause the IBM3206K0424 to stop transferring data. It is
asserted for a pulse, and then removed. This signal is asserted
low.
2
C protocol. The range of supported serial EPROM is
Pin Description
pnr25.chapt02.01
August 14, 2000
Preliminary