ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 270

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ibm3206k0424

Manufacturer Part Number
ibm3206k0424
Description
Ibm Processor For Network Resources
Manufacturer
ETC-unknow
Datasheet
IBM3206K0424
IBM Processor for Network Resources
9.19: POOLS Last Primitive Trap Register
The POOLS Last Primitive Trap Register provide debug assistance. It contains the 32-bit last primitive
address, and it is the last primitive address to POOLS, as selected in the POOLS Control Register, while in
operational mode.
Length
Type
Address
Power on Reset values X’00 00 00 00’
Restrictions
9.20: POOLS Last Buffer Map Read on Free Register
The POOLS Last Buffer Map Read on Free Register provide debug assistance. It contains the 32-bit address
of the buffer map used in the last free operation, and it is the address of the last buffer map read on a free.
Length
Type
Address
Power on Reset values X’00 00 00 00’
Restrictions
9.21: POOLS Error Lock Enable Register
The POOLS Error Lock Enable Register provides the ability to halt pools when the corresponding status bit in
the status register are set.
When a bit in this register that corresponds to a bit that is set in the status register, the state machines in
pools will be held in idle state until the lock is disabled.
See Note on Set/Clear Type Registers on page 93 for more details on addressing.
Length
Type
Address
Power on Reset value
Restrictions
Buffer Pool Management (POOLS)
Page 270 of 676
32 bits
Read
XXXX 30E8
None
32 bits
Read
XXXX 30EC
None
21 bits
Clear/Set
XXXX 30D8 and DC
X’00 F8 00’
None
pnr25.chapt04.01
August 14, 2000
Preliminary

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