ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 325

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

Preliminary
General Layout of a Scatter DMA List
struct dmaList {
The first eight bytes are always present and are filled in when the packet is complete or when an error occurs.
The actual page list is filled in as the data is DMAed. The first location is initially skipped and is filled in later
when the header is DMAed. The second and subsequent entries are filled as each page is DMAed. Each
page list entry contains either physical page addresses, IBM3206K0424-based DMA descriptor addresses, or
user data. Whether a physical page address or DMA descriptor address is present depends on the cut
through configuration. From here on, the term page address and DMA descriptor are used interchangeably
as either is valid based on the configuration, but the correct term is used when the context requires it.
A page list entry can contain one or two pieces of information. Each page list entry can be 32, 64, or 128 bits
long. If using 32 bit addresses, then the entry is 32 or 64 bits. If using 64-bit addresses, then the entry is 64 or
128 bits. The first piece is always the page address or the DMA descriptor address. Each cut through config-
uration allows the user to specify an optional second deque operation from the receive queue being used.
This allows the user to place user information associated with the particular page address in the receive
queue and the page list. Thus, the corresponding virtual address of a page could be surfaced along with the
physical page address. It is very important to enque information to the receive queue in the proper order if
using this mode. The physical page address is first, followed by the user information.
As the receive packet data is being received, it is DMAed as soon as a page crossing occurs if there is a DMA
descriptor available on the receive queue being used. If no descriptor is available, then no DMA takes place
until the next receive cell is received, at which time the receive queue availability is checked again. This
catch-up process continues until the packet is complete. When the packet is complete, all DMAs are sched-
uled if page addresses are available. If a page address is not available, then a "no DMA descriptor available"
is surfaced to the user so the packet can be used and the DMA list recovered.
As each data page is DMAed to the user, a DMA descriptor is formed and enqueued to the DMAQS DMA
queue specified in the cut through configuration. The DMA descriptor is formed based on if page addresses
or DMA descriptor are provided on the receive queue being used. If IBM3206K0424-based DMA descriptors
are being used, then the receive queue contains DMA descriptor chains where the low order bits of the DMA
descriptor address specify how many descriptors are in the chain. Typically, this chain length is one, but more
can be used. The first descriptor in the chain provides the destination address (page address) which is filled
in by the user. The source address, the length, and the flags are filled in by the IBM3206K0424 for the first
descriptor in the chain. The source address is filled in with the beginning address of the page within the
current receive buffer. The length is filled in with either the page size (if a full page is present) or the number
of bytes in the last page for the last page. The flags are filled in using the flags from the appropriate RXALL -
Scatter/Cut Through Flag Registers. If physical page addresses are contained in the receive queue, then a
pnr25.chapt05.01
August 14, 2000
};
bit16 numHeadbytes;
bit16 numTailbytes;
bit1 deqLocked;
bit1 deqInvalid;
bit1 headerTruncated;
bit1 badDmaList;
bit4 DeqLockedQueueNum; // "
bit16 reserved;
bit2 cutThruSel;
bit6 numPages;
bit32 pageList[N];
// Note: each entry can be 32, 64, or 128 bits wide
// "
// copy of cutThruSel used from receive lcd
// number of page entries that follow (max=63)
// error status
// Actual dma descriptors or page addresses
// "
// number of bytes in last dma page
// "
// number of bytes included with header dma
IBM Processor for Network Resources
Cell/Packet Re-assembly (REASM)
Page 325 of 676
IBM3206K0424