ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 305

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ibm3206k0424

Manufacturer Part Number
ibm3206k0424
Description
Ibm Processor For Network Resources
Manufacturer
ETC-unknow
Datasheet
Preliminary
11.1: SEGBF Software LCD Enqueue
This register provides a mechanism for software to transmit a single cell or a group of cells making up a buffer
that can contain any user-defined data at any time. To cause a cell/buffer to be transmitted, the software must
write the address of a valid LCD control block to this register. The segmentation hardware will then construct
a cell to match the AAL type defined in the LCD control block, using the segmentation pointer contained in the
LCD to fetch data and present this cell to the next lower level of hardware to transmit. This method of cell
transmission bypasses the cell scheduler completely, so it is the responsibility of the software to ensure that
peak and average rates are not violated. When the segmentation logic has completed building the cell/frame
and queued it for transmission, the LCD address will be loaded into the software LCD complete register. This
method of cell transmission is not designed for high performance and, as such, there is only a single level of
queueing underneath the complete register. It is recommended that only a single software LCD be queued to
the segmentation logic at any one time to prevent hanging the segmentation logic as it attempts to queue a
complete software LCD to the complete queue.
Length
Type
Address
Power On Value
Restrictions
pnr25.chapt05.01
August 14, 2000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit(s)
31-7
6-5
4-0
These bits contain the upper 25 bits of the address of the VCI control block.
These bits define which drop this enqueue operation will be associated with.
These bits control what type of cell will be built by the segmentation logic. There are currently only two valid values for
these bits. If these bits are all ’0’, a normal cell as defined by the LCD will be built. If these bits have a value of 0x1F, an
ABR cell will be built using fields defined in the LCD.
32 bits
Read/Write
XXXX 1400
X’0000 0000’
Before enqueing a VCI, software must ensure that the previous software enqueue
has been handled by the hardware. This is accomplished by reading this register
before an enqueue is attempted. If a value of ’0’ is returned, the segmentation
hardware is ready to accept an enqueue operation. If a non-zero value is returned,
it will be the address of the previous VCI that was enqueued and this indicates that
the segmentation hardware has not been able to enqueue the VCI to it's internal
VCI buffer segmentation queue. If this mechanism shows that this interface is busy
and unable to accept new VCI addresses for any appreciable amount of time (tens
of µs), it is likely that a condition exists which is preventing the hardware below the
segmentation logic from accepting cells for transmission, and the segmentation
logics input buffer is full. This mechanism also adds the restriction that a VCI
control block should never exist at address ‘0’.
VCI Control Block Address
Description
IBM Processor for Network Resources
ATM Transmit Buffer Segmentation (SEGBF)
9
8
7
6
Drop
5
4
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IBM3206K0424
Cell Type
3
2
1
0

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