ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 217

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

Preliminary
Entity 7: ATM Packet/Control Memory Arbitration Logic (ARBIT)
This section contains descriptions of the registers used by the arbiter logic.
7.1: ARBIT Control Priority Resolution Register High
The bits in this register define the priority of requesting entities to Control Memory.
Length
Type
Address
Restrictions
Power On Value
pnr25.chapt04.01
August 14, 2000
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
27-24
23-20
19-16
15-12
Bit(s)
11-8
7-4
3-0
The value loaded into these bits defines which entity will be requesting at priority level E (lowest priority).
Value encoding is:
F: Reserved
E: CHKSM
D: PCORE LO
C: BCACH LO
B: POOLS LO
A: CSKED
9: RXXLT
8: RXQUE
The value loaded into these bits defines which entity will request at priority level D. Value encoding is as listed in the
description of bits 27-24.
The value loaded into these bits defines which entity will request at priority level C. Value encoding is as listed in the
description of bits 27-24.
The value loaded into these bits defines which entity will request at priority level B.Value encoding is as listed in the
description of bits 27-24.
The value loaded into these bits defines which entity will request at priority level A. Value encoding is as listed in the
description of bits 27-24.
The value loaded into these bits defines which entity will request at priority level 9. Value encoding is as listed in the
description of bits 27-24.
The value loaded into these bits defines which entity will request at priority level 8. Value encoding is as listed in the
description of bits 27-24.
28 bits
Read/Write
XXXX 0E00
None
X’EDC BA98’
7:
6:
5:
4:
3:
2:
1:
0:
SEGBF
TXLCD
RXLCD
GPDMA
DMAQS
PCORE HI
BCACH HI
POOLS HI
Description
9
ATM Packet/Control Memory Arbitration Logic (ARBIT)
8
7
IBM Processor for Network Resources
6
5
4
3
2
1
0
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IBM3206K0424