ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 244

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ibm3206k0424

Manufacturer Part Number
ibm3206k0424
Description
Ibm Processor For Network Resources
Manufacturer
ETC-unknow
Datasheet
IBM3206K0424
IBM Processor for Network Resources
8.6: BCACH Line Valid Bytes Register
These registers are useful only in diagnostic testing of the cache logic. Each register will contain a bit signifi-
cant flag indicating which bytes in the 32-byte cache line are valid. All of these bits will be active after a cache
line fill operation has occurred, but any combination of these bits can be valid after the processor has per-
formed a write operation to memory.
Length
Type
Address
Power on Value
Restrictions
The Bus DRAM Cache Controller (BCACH)
Page 244 of 676
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit(s)
31-0
Each bit indicates whether the associated byte in the cache line contains valid data or not. If the bit is set, the cache line
contains valid data and a fetch from main storage is not required to fulfill a request for a read from this location. If the bit is
reset, a read of the associated location will require a cache line fill operation before the request can complete.
32 bits
Read Only
Tag Number 0
Tag Number 1
Tag Number 2
Tag Number 3
X’0000 0000’
None
Cache Line Fill Operation Set/Reset
XXXX 1084
XXXX 10A4
XXXX 10C4
XXXX 10E4
Description
9
8
7
6
5
4
pnr25.chapt04.01
August 14, 2000
3
Preliminary
2
1
0

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