ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 54

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

IBM3206K0424
IBM Processor for Network Resources
PHY Bus Pin Descriptions
ATM PHY Bus Interface
Page 54 of 676
Note: Because some of the PHY transmit I/Os are used for receive framer functions and vice versa, there are some restrictions on how
the interfaces can be used.
Quantity
1. If the transmit path is using an external PHY and the receive path is using the internal framer, FYTPAR(1) will assume the OOF
2. If the receive path is using an external PHY and the transmit path is using the internal framer, FYRPAR(1) will assume the OFPtx-
3. If the transmit path is using an external PHY and the receive path is using the internal framer, and the external PHY has a 16-bit
1
1
1
2
2
2
2
1
1
function and not be available as a parity output. This is only a concern if the PHY uses a 16-bit data interface and parity is being
used.
LPow function and not be available as a parity input. This is only a concern if the PHY uses a 16-bit data interface.
data interface, then the receive HDLC interface cannot be used. The three I/O for the RX HDLC interface will instead take on the
function of FYTDAT(15-13).
FYTSDATP/N
FYTSCLKP/N
FYRSDATP/N
FYRSCLKP/N
FYDISCRD
Pin Name
FYRMOD
FYTMOD
FYTEOP
FYDTCT
Input/Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
(Page 3 of 3)
PHY Transmit EOP
PHY Receive MOD
PHY Transmit MOD
(Differential)
SERDES Transmit Clock
(Differential)
SERDES Receive Data
(Differential)
SERDES Receive Clock
(Differential)
PHY Carrier Detect
SERDES Transmit Data
PHY Cell Discard
Pin Function
When using an external POS-PHY, this signal indicates if the
FYTDATA (15-0) contains the last data of a packet. If the exter-
nal PHY is not a POS-PHY, this signal should ignored.
When using an external POS-PHY, this signal indicates if the
FYRDATA (7-0) contains valid data. If FYRMOD is ’1’, FYR-
DATA(7-0) is ignored. FYRMOD is only relevant when
FYREOP is ’1’. A value of ’1’ any other time will be ignored. If a
POS-PHY is not connected, this signal should be tied to GND.
When using an external POS-PHY, this signal indicates if the
FYTDATA (7-0) contains valid data. If FYTMOD is ’1’, FYR-
DATA(7-0) will be ignored. FYTMOD is only driven to a ’1’
when FYTEOP is ’1’.
When using the internal framer and the internal SERDES,
these signals provide the serial transmit data stream. When the
transmit side of LINKC is connected to an Echo interface, this
differential driver will provide the clock that goes with the data
FYRDAT(7-0), parity FYTPAR(7-0), and SOC FYTSOC.
When using the internal framer and the internal SERDES, the
reference 155.52MHz clock is supplied on these signals. When
not in use, these should be tied to (TBD).
When using the internal framer and the internal SERDES, the
recovered receive data is supplied on these signals. When not
in use, these should be tied to (TBD).
When using the internal framer and the internal SERDES, the
recovered 155.52MHz clock is supplied on these signals.
When not in use, these should be tied to (TBD).
When using an external PHY, the PHY uses this signal to indi-
cate carrier detect. When using the internal framer, this signal
provides the deserializer lock detect signal, ELockDet, from the
deserializer.
When using an external PHY, this signal causes the current
cell being received to be discarded. In this case it should only
be asserted for the duration of one of the 53 bytes of the ATM
cell. When using the internal framer, this signal provides the
optical/electrical module Loss-Of-Signal indication, LossSig.
Pin Description
pnr25.chapt02.01
August 14, 2000
Preliminary