ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 502

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

IBM3206K0424
IBM Processor for Network Resources
18.3: PPOCM Interrupt Enable Register
This register enables the bits of the Status Register to generate an interrupt. The bits of this register corre-
spond to the bits of the status register. See Note on Set/Clear Type Registers on page 93 for more details on
addressing.
Length
Type
DCR Address
Power on Reset value
Restrictions
18.4: PPOCM DMA Off-Chip Effective Address Register
This register provides the DMA controller the effective address of the off-chip portion of the DMA.
Length
Type
DCR Address
Power on Reset value
Restrictions
PowerPC On-Chip Memory (PPOCM) Entity
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Bit(s)
Bit(s)
31-3
2-0
1
0
Timeout
Complete
Reserved
Reserved
Name
Name
32 bits
Read/Write
104 AND 05
X’00000000’
None
32 bits
Read/Write
106
X’00000000’
None
This bit, set to a ’1,’ indicates that the DMA timer expired.
This bit, set to a ’1,’ indicates that the DMA completed. The other bits in this register
being a ’0’ will indicate a good completion.
Reserved
Reserved
Reserved
Description
Description
8
7
6
5
4
pnr25.chapt05.01
August 14, 2000
3
Preliminary
Reserved
2
1
0