ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 46

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ibm3206k0424

Manufacturer Part Number
ibm3206k0424
Description
Ibm Processor For Network Resources
Manufacturer
ETC-unknow
Datasheet
IBM3206K0424
IBM Processor for Network Resources
Memory I/O Cross Reference By Device Type
DRAM Memory Bus Interface
Page 46 of 676
1. All signal groups marked by an asterisk are active at the same time.
2. xx = CM for Control Memory or PM for Packet Memory.
3. For SDRAMs, the DQM signals are active independently for shared ECC configurations.
4. For SDRAMs with split ECC, the DQMs are usually active unless doing burst length two and the DQM is needed to terminate a
burst.
IBM3206K0424 I/O
xxSYNRAS(1:0)
xxSYNCAS(1:0)
xxDATA(35:32)
xxDATA(38:36)
xxADDR(20:0)
xxDATA(31:0)
xxDQM(3:2)
xxDQM(1:0)
xxWE(1:0)
xxCS(1:0)
xxCS(3)
xxCS(2)
xxCLKE
Bank Address(0)
Chip Select(1:0)
2-Bank Device
Address(20:0)
Sync DRAM
Data(31:0)
RAS(1:0)
CAS(1:0)
DQM(1:0)
DQM(1:0)
WE(1:0)
ECC(3:0)
ECC(6:4)
CKE
N/A
1
1
1
Bank Address(1)
Bank Address(0)
Chip Select(1:0)
4-Bank Device
Address(20:0)
Sync DRAM
Data(31:0)
RAS(1:0)
CAS(1:0)
DQM(1:0)
DQM(1:0)
WE(1:0)
ECC(3:0)
ECC(6:4)
CKE
1
1
1
Byte Enable(3:2)
Byte Enable(1:0)
Chip Select(1:0)
Chip Select(3)
Chip Select(2)
Address(20:0)
Data(31:0)
Parity(3:0)
WE(1:0)
OE(1:0)
OE(1:0)
SRAM
N/A
pnr25.chapt02.01
August 14, 2000
Preliminary
1
1
1

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