ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 218

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

IBM3206K0424
IBM Processor for Network Resources
7.2: ARBIT Control Priority Resolution Register Low
The bits in this register define the priority of requesting entities to Control Memory.
Length
Type
Address
Restrictions
Power On Value
ATM Packet/Control Memory Arbitration Logic (ARBIT)
Page 218 of 676
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31-28
27-24
23-20
19-16
15-12
Bit(s)
11-8
7-4
3-0
The value loaded into these bits defines which entity will request at priority level 7. Value encoding is:
F: Reserved
E: CHKSM
D: PCORE LO
C: BCACH LO
B: POOLS LO
A: CSKED
9: RXXLT
8: RXQUE
The value loaded into these bits defines which entity will request at priority level 6. For value encoding, see the descrip-
tion of bits 31-28.
The value loaded into these bits defines which entity will request at priority level 5. For value encoding, see the descrip-
tion of bits 31-28.
The value loaded into these bits defines which entity will request at priority level 4. For value encoding, see the descrip-
tion of bits 31-28.
The value loaded into these bits defines which entity will request at priority level 3. For value encoding, see the descrip-
tion of bits 31-28.
The value loaded into these bits defines which entity will request at priority level 2. For value encoding, see the descrip-
tion of bits 31-28.
The value loaded into these bits defines which entity will request at priority level 1. For value encoding, see the descrip-
tion of bits 31-28.
The value loaded into these bits defines which entity will request at priority level 0 (highest priority). For value encoding,
see the description of bits 31-28.
32 bits
Read/Write
XXXX 0E04
None
X’7654 3210’
7:
6:
5:
4:
3:
2:
1:
0:
SEGBF
TXLCD
RXLCD
GPDMA
DMAQS
PCORE HI
BCACH HI
POOLS HI
Description
9
8
7
6
5
4
pnr25.chapt04.01
August 14, 2000
3
Preliminary
2
1
0