ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 34

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

IBM3206K0424
IBM Processor for Network Resources
System Environment
The dataflow context of an ATM subsystem is shown in the diagram below. The purpose of the communica-
tions subsystem of any digital device is to allow the application to share data and to adjudicate the flow of
control with other devices.
System Context of an ATM Subsystem
As shown in the figure above, data, in the form of application objects or control structures, are divided into
communication frames at the communication stack interface. The stack may further partition the frames to fit
reliability, efficiency, latency, and protocol requirements.
In most cases, the communication stack encapsulates the data frame with protocol headers and/or trailers.
These header blocks are often located in memory in areas apart from the data frames. A device driver is often
given the task of moving this scattered memory to the actual transmission device. Scatter DMA is often used
to make this operation efficient.
In the case of the IBM Processor for Network Resources, the data can be DMAed into virtually contiguous
buffers connected to and controlled by the IBM3206K0424. It is also possible to write the frame headers
directly from the processor to the IBM3206K0424 memory. The fully assembled frame is enqueued for trans-
mission over a particular logical channel. (See more on the richness of logical channels in ATM and the
IBM3206K0424 in Data Structures on page 61).
The logical channels with pending work are serviced by the ATM Segmentation Layer which breaks the
enqueued data into 48-byte chunks (depending on the ATM Adaptation Layer (AAL)) and prefixes it with a
five-byte header (yielding the prime number 53) in preparation for transmission.
A Transmission Convergence (TC) sublayer appropriate for the Physical Layer (PHY) and Physical Media
Dependent (PMD) connection is then exercised, making ATM cells suitable for transmission.
The receiving process is the reverse of the transmission process, except that the scheduling performed dur-
ing transmission is replaced by an identification-demultiplexing step during the reception of cells.
System Environment
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Frame Headers
and Data
Data Frames
Object Data
Packet Memory
Cells
ATM
Communication Stack
Physical Layer (TC)
Device Driver
PMD / Transceiver
Segmentation
Application
Application
Scheduling
TCP/IP Mapping
Channels
LAN Emulation
Local
Object Data
Control Memory
pnr25.chapt01.01
August 14, 2000
Preliminary